|
| 1 | +.. _key-writer-label: |
| 2 | + |
| 3 | +########## |
| 4 | +Key Writer |
| 5 | +########## |
| 6 | + |
| 7 | +This OTP (One Time Programmable) key writer guide describes how to |
| 8 | +populate customer keys in eFuses of the SoC. |
| 9 | + |
| 10 | +.. caution:: |
| 11 | + |
| 12 | + Once you program the SoC eFuses using keywriter, |
| 13 | + there is no going back. This action of burning the OTP fields is |
| 14 | + irreversible. |
| 15 | + |
| 16 | +**High Security (HS) Device Sub-types** |
| 17 | + |
| 18 | +*HS-FS (High Security - Field Securable)*: |
| 19 | +Device type before you program customer keys (the state in which |
| 20 | +the device leaves TI factory). In this state, device protects the |
| 21 | +ROM code, TI keys and certain security peripherals. HS-FS devices do |
| 22 | +not enforce secure boot process. |
| 23 | + |
| 24 | +*HS-SE (High Security - Security Enforced)*: |
| 25 | +Device type after you program the customer keys. |
| 26 | +HS-SE devices enforce secure boot (with encryption). |
| 27 | + |
| 28 | +**HS-FS to HS-SE Conversion** |
| 29 | + |
| 30 | +To convert a HS-FS device to HS-SE device, program the customer |
| 31 | +root key (optionally backup key) on the target device by using |
| 32 | +OTP Keywriter. |
| 33 | + |
| 34 | +Customer key information is encrypted into a x509 certificate |
| 35 | +to create a binary blob. |
| 36 | + |
| 37 | +**U-Boot Key Writer Structure** |
| 38 | + |
| 39 | +.. code-block:: c |
| 40 | +
|
| 41 | + struct fuse_otp_header { |
| 42 | + uint32_t version_info; |
| 43 | + uint32_t fuse_mode; |
| 44 | + } __attribute__((packed)); |
| 45 | +
|
| 46 | + struct fuse_otp { |
| 47 | + struct fuse_otp_header fuse_otp_hdr; |
| 48 | + struct fuse_otp_blob fuse_otp_blb; |
| 49 | + } __attribute__((packed)); |
| 50 | +
|
| 51 | +* version_info : Customer can use this field to denote the version of U-Boot fuse programming. |
| 52 | +* fuse_mode : Fuse mode with value 0x00009031. |
| 53 | + |
| 54 | +The following shows the overall fuse_otp structure: |
| 55 | + |
| 56 | +.. Image:: /images/Uboot_fuse_writebuff_OTP_keywriter_structure.png |
| 57 | + |
| 58 | +.. attention:: |
| 59 | + |
| 60 | + For information about the fuse_otp_blob x509 keywriter certificate, |
| 61 | + visit `keywriter_cert_gen_procedure`_. |
| 62 | + |
| 63 | +.. _keywriter_cert_gen_procedure: https://software-dl.ti.com/tisci/esd/latest/6_topic_user_guides/key_writer.html |
| 64 | + |
| 65 | +**Generate the Binary Blob** |
| 66 | + |
| 67 | +Generate the binary blob based out of U-Boot Key Writer |
| 68 | +x509 certificate and copy the bin file to a SD card. |
| 69 | + |
| 70 | +**Typical Key Writer Flow** |
| 71 | + |
| 72 | +A typical flow to do OTP key writer is as follows: |
| 73 | + |
| 74 | +#. Addr 0x82000000 is the dedicated address to store the generated |
| 75 | + key writer binary blob. Clear out 12Kb of memory starting |
| 76 | + from 0x82000000: |
| 77 | + |
| 78 | + .. code-block:: text |
| 79 | +
|
| 80 | + => mw 0x82000000 0 0x3000 |
| 81 | +
|
| 82 | +#. Load the binary blob from SD card into memory using |
| 83 | + commands such as: |
| 84 | + |
| 85 | + .. code-block:: text |
| 86 | +
|
| 87 | + => fatload mmc 1:1 0x82000000 key_writer_blob.bin |
| 88 | +
|
| 89 | +#. Read the memory addr 0x82000000 to verify that you loaded the blob successfully. |
| 90 | + |
| 91 | + .. code-block:: text |
| 92 | +
|
| 93 | + => md 0x82000000 |
| 94 | +
|
| 95 | +#. Efuse modification requires a voltage to be applied on a specific pin (Vpp) during the programming. |
| 96 | + To program the efuses, the Vpp pin on the System-on-Chip (SoC) must be powered at 1.8V. It is the |
| 97 | + responsibility of the SoC user to design a suitable circuit that enables the Vpp pin to be powered. |
| 98 | + |
| 99 | + Texas Instruments (TI) EVMs feature an I2C-based IO expander, which has one of its IO pins |
| 100 | + connected to the SoC's Vpp pin. The software required to control the power to the Vpp pin depends |
| 101 | + on the specific circuit implementation. |
| 102 | + |
| 103 | + In the case of TI AM62L PROC181E1-1 EVMs, an I2C driver is necessary to send command packets to the IO expander, |
| 104 | + which then toggles the IO pin connected to the Vpp pin, thereby controlling the power supply to the pin. |
| 105 | + On TI EVM, turn on the Vpp pin using the following commands: |
| 106 | + |
| 107 | + .. rubric:: Select i2c bus 1, as chip 22 is connected to it, and probe the chip: |
| 108 | + |
| 109 | + .. code-block:: text |
| 110 | +
|
| 111 | + => i2c dev 1 |
| 112 | + => i2c probe 22 |
| 113 | +
|
| 114 | + .. rubric:: To turn off Vpp: |
| 115 | + |
| 116 | + .. code-block:: text |
| 117 | +
|
| 118 | + => i2c mw 0x22 0x04 0x00 |
| 119 | +
|
| 120 | + .. rubric:: To configure Vpp (port 04) as output: |
| 121 | + |
| 122 | + .. code-block:: text |
| 123 | +
|
| 124 | + => i2c mw 0x22 0xC 0xEF |
| 125 | +
|
| 126 | + .. rubric:: To turn on Vpp: |
| 127 | + |
| 128 | + .. code-block:: text |
| 129 | +
|
| 130 | + => i2c mw 0x22 0x04 0x10 |
| 131 | +
|
| 132 | +#. Call fuse writebuff sub-system command with the address 0x82000000: |
| 133 | + |
| 134 | + .. code-block:: text |
| 135 | +
|
| 136 | + => fuse writebuff -y 0x82000000 |
| 137 | +
|
| 138 | +#. Turn off Vpp after programming is successful: |
| 139 | + |
| 140 | + .. code-block:: text |
| 141 | +
|
| 142 | + => i2c mw 0x22 0x04 0x00 |
| 143 | +
|
| 144 | +.. note:: |
| 145 | + |
| 146 | + Changes made to efuses, by programming them, take effect (such as becoming |
| 147 | + visible in Memory-Mapped Registers (MMRs), device type change and so on) |
| 148 | + after a complete System-on-Chip (SoC) power cycle. |
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