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rename relations for Codebeamer compatibility
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26 files changed

+218
-217
lines changed

26 files changed

+218
-217
lines changed

MODULE.bazel

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Original file line numberDiff line numberDiff line change
@@ -60,6 +60,7 @@ git_override(
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git_override(
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module_name = "score_docs_as_code",
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commit = "21640ab325b3aae147ba4e3e8b5e7ab89fc2e8f5",
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remote = "https://github.com/etas-contrib/score_docs-as-code.git",
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# TODO: revert to main once https://github.com/RSingh1511/docs-as-code/pull/new/rs/rename-relations-codebeamer is merged
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commit = "dcbf9c99f592159f49aa8231a053d673e9d2dcde",
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remote = "https://github.com/RSingh1511/docs-as-code.git",
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)

process/folder_templates/features/feature_name/architecture/index.rst

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@@ -54,14 +54,14 @@ Requirements
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.. needtable:: Overview of Feature Requirements
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:style: table
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:columns: title;id
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:filter: search("feat_arch_sta__archdes$", "fulfils_back")
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:filter: search("feat_arch_sta__archdes$", "satisfies_back")
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:colwidths: 70,30
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.. needtable:: Overview of Feature Requirements
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:style: table
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:columns: title;id
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:filter: search("feat_arch_sta__archdes$", "fulfils_back")
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:filter: search("feat_arch_sta__archdes$", "satisfies_back")
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:colwidths: 70,30
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@@ -89,7 +89,7 @@ Static Architecture
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:security: YES
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:safety: ASIL_B
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:status: invalid
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:fulfils: feat_req__feature_name__some_title
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:satisfies: feat_req__feature_name__some_title
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:includes: logic_arc_int__feature_name__interface_name1
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:belongs_to: feat__feature_name
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@@ -107,7 +107,7 @@ Dynamic Architecture
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:security: YES
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:safety: ASIL_B
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:status: invalid
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:fulfils: feat_req__feature_name__some_title
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:satisfies: feat_req__feature_name__some_title
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:belongs_to: feat__feature_name
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Put here a sequence diagram
@@ -120,7 +120,7 @@ Logical Interfaces
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:security: YES
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:safety: ASIL_B
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:status: invalid
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:fulfils: feat_req__feature_name__some_title
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:satisfies: feat_req__feature_name__some_title
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General Interface Description
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process/folder_templates/features/feature_name/requirements/index.rst

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@@ -39,7 +39,7 @@ Feature Requirements
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:reqtype: Process
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:security: NO
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:safety: ASIL_B
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:satisfies: stkh_req__requirements__template
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:derived_from: stkh_req__requirements__template
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:valid_from: v0.0.1
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:valid_until: v1.0.1
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:status: invalid

process/folder_templates/modules/module_name/component_name/docs/architecture/index.rst

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@@ -45,7 +45,7 @@ Requirements Linked to Component Architecture
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.. needtable:: Overview of Component Requirements
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:style: table
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:columns: title;id
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:filter: search("comp_arch_sta__archdes$", "fulfils_back")
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:filter: search("comp_arch_sta__archdes$", "satisfies_back")
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:colwidths: 70,30
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Description
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:status: invalid
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:belongs_to: comp__component_name_template
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:uses: logic_arc_int__feature_name__interface_name1
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:fulfils: comp_req__component_name__some_title
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:satisfies: comp_req__component_name__some_title
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.. needarch::
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:scale: 50
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:safety: ASIL_B
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:status: invalid
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:belongs_to: comp__component_name_template
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:fulfils: comp_req__component_name__some_title
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:satisfies: comp_req__component_name__some_title
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Put here a sequence diagram
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:id: real_arc_int__<component>__<Title>
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:security: <YES|NO>
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:safety: <QM|ASIL_B>
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:fulfils: <link to component requirement id>
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:satisfies: <link to component requirement id>
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:language: cpp
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Internal Components
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:status: invalid
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:safety: ASIL_B
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:security: YES
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:fulfils: comp_req__component_name__some_title
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:satisfies: comp_req__component_name__some_title
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:belongs_to: comp__component_example_2
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No architecture but detailed design

process/folder_templates/modules/module_name/component_name/docs/requirements/index.rst

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@@ -42,7 +42,7 @@ Component Requirements
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:reqtype: Process
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:security: YES
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:safety: ASIL_B
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:satisfies: feat_req__feature_name__some_title
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:derived_from: feat_req__feature_name__some_title
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:status: invalid
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:belongs_to: comp__component_name_template
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process/general_concepts/score_review_concept.rst

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@@ -187,7 +187,7 @@ Process Requirements
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:status: valid
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:tags: prio_1_automation, general
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:complies: std_req__iso26262__support_6433, std_req__iso26262__software_7414
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:satisfies: wf__monitor_verify_requirements
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:derived_from: wf__monitor_verify_requirements
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The version of a requirement shall not change by an inspection.
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:status: draft
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:tags: general
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:complies: std_req__iso26262__support_6433, std_req__iso26262__software_7414
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:satisfies: wf__mr_vy_arch
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:derived_from: wf__mr_vy_arch
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The version of architecture element shall not change by an inspection.
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:status: valid
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:tags: prio_2_automation, general
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:complies: std_req__iso26262__support_6433, std_req__iso26262__software_7414, std_req__iso26262__software_942
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:satisfies: wf__monitor_verify_requirements, wf__mr_vy_arch
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:derived_from: wf__monitor_verify_requirements, wf__mr_vy_arch
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For every pull request that modifies a work product subject to inspection,
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a pull‑request template containing the applicable inspection checklist items shall be provided.
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:status: valid
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:tags: prio_2_automation, general
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:complies: std_req__iso26262__support_6433, std_req__iso26262__software_7414
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:satisfies: wf__monitor_verify_requirements, wf__mr_vy_arch
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:derived_from: wf__monitor_verify_requirements, wf__mr_vy_arch
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It shall be checked that only a PR with the inspection checklist filled out can set a status to valid(inspected).
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:status: valid
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:tags: prio_2_automation, general
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:complies: std_req__iso26262__support_6433, std_req__iso26262__software_7414
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:satisfies: wf__monitor_verify_requirements, wf__mr_vy_arch
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:derived_from: wf__monitor_verify_requirements, wf__mr_vy_arch
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It shall be checked that the status is reset to valid whenever a requirement is modified (changes version).

process/process_areas/architecture_design/architecture_concept.rst

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@@ -131,7 +131,7 @@ The first viewpoint is named as *feature architecture*. It displays the SW Compo
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:safety: QM
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:status: valid
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:includes: logic_arc_int__example_feature__archex_logical_interface_1, logic_arc_int__example_feature__archex_logical_interface_2
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:fulfils: feat_req__example_feature__archdes_example_req
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:satisfies: feat_req__example_feature__archdes_example_req
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:belongs_to: feat__example_feature
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.. needarch::
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:safety: ASIL_B
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:status: valid
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:fulfils: feat_req__example_feature__archdes_example_req
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:satisfies: feat_req__example_feature__archdes_example_req
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:security: NO
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:fulfils: comp_req__example_feature__archex_example_req
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:satisfies: comp_req__example_feature__archex_example_req
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:safety: ASIL_B
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:fulfils: comp_req__example_feature__archex_example_req
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:satisfies: comp_req__example_feature__archex_example_req
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:language: cpp
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.. needarch::
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:includes: logic_arc_int__example_feature__archex_logical_interface_1, logic_arc_int__example_feature__archex_logical_interface_2
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:fulfils: feat_req__example_feature__archdes_example_req
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:satisfies: feat_req__example_feature__archdes_example_req
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:fulfils: feat_req__example_feature__archdes_example_req
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:satisfies: feat_req__example_feature__archdes_example_req
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.. needarch::
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:satisfies: comp_req__example_feature__archex_example_req
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.. needarch::
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:satisfies: comp_req__example_feature__archex_example_req
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:satisfies: comp_req__example_feature__archex_example_req
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.. needarch::
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:satisfies: comp_req__example_feature__archex_example_req
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:belongs_to: comp__component_component_manual_getstrt
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.. needuml::
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:safety: ASIL_B
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:uses: logic_arc_int__example_feature__archex_logical_interface_1
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:satisfies: comp_req__example_feature__archex_example_req
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.. needarch::

process/process_areas/architecture_design/guidance/architecture_modeling_example.rst

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:includes: logic_arc_int__example_feature__archex_logical_interface_1, logic_arc_int__example_feature__archex_logical_interface_2, logic_arc_int__example_feature__archex_logical_interface_3
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:fulfils: feat_req__example_feature__archdes_example_req
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:derived_from: feat_req__example_feature__archdes_example_req
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.. needarch::
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.. Logical Interface Operation
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:derived_from: feat_req__example_feature__archdes_example_req
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:status: valid
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:belongs_to: comp__component_example_2
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