From bb89edf1b4bbeedf23261842d444a39f2a753785 Mon Sep 17 00:00:00 2001 From: Maciej Pijanowski Date: Fri, 27 Feb 2026 15:12:05 +0100 Subject: [PATCH 01/25] modules/dasharo-ec: new module Squashed from: https://github.com/tlaurion/heads/commit/2df1c8b5bdfd7999ebaa65140a92e0df061a930f https://github.com/tlaurion/heads/commit/447d464043cb69126420c06eb280c1746dccae31 then, updated EC revision as per: https://github.com/Dasharo/ec/pull/82#issuecomment-4048416056 Signed-off-by: Maciej Pijanowski --- .../novacustom-v540tu.config | 1 + .../novacustom-v560tu.config | 1 + config/coreboot-novacustom-v540tu.config | 5 +- modules/dasharo-ec | 50 +++++++++++++++++++ 4 files changed, 55 insertions(+), 2 deletions(-) create mode 100644 modules/dasharo-ec diff --git a/boards/novacustom-v540tu/novacustom-v540tu.config b/boards/novacustom-v540tu/novacustom-v540tu.config index 7f1d023f6..6b6d757a2 100644 --- a/boards/novacustom-v540tu/novacustom-v540tu.config +++ b/boards/novacustom-v540tu/novacustom-v540tu.config @@ -15,6 +15,7 @@ export CONFIG_COREBOOT=y export CONFIG_COREBOOT_VERSION=dasharo +export CONFIG_DASHARO_EC=y export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-novacustom-v540tu.config diff --git a/boards/novacustom-v560tu/novacustom-v560tu.config b/boards/novacustom-v560tu/novacustom-v560tu.config index cf6e7a095..f9899c705 100644 --- a/boards/novacustom-v560tu/novacustom-v560tu.config +++ b/boards/novacustom-v560tu/novacustom-v560tu.config @@ -15,6 +15,7 @@ export CONFIG_COREBOOT=y export CONFIG_COREBOOT_VERSION=dasharo +export CONFIG_DASHARO_EC=y export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-novacustom-v560tu.config diff --git a/config/coreboot-novacustom-v540tu.config b/config/coreboot-novacustom-v540tu.config index 4f947d78c..44da03805 100644 --- a/config/coreboot-novacustom-v540tu.config +++ b/config/coreboot-novacustom-v540tu.config @@ -543,8 +543,9 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y -CONFIG_EC_SYSTEM76_EC=y -# CONFIG_EC_SYSTEM76_EC_UPDATE is not set +CONFIG_EC_DASHARO_EC=y +CONFIG_EC_DASHARO_EC_UPDATE=y +CONFIG_EC_DASHARO_EC_UPDATE_FILE="ec.rom" # # Intel Firmware diff --git a/modules/dasharo-ec b/modules/dasharo-ec new file mode 100644 index 000000000..041283c0b --- /dev/null +++ b/modules/dasharo-ec @@ -0,0 +1,50 @@ +ifeq "$(CONFIG_DASHARO_EC)" "y" + +modules-y += dasharo-ec + +dasharo-ec_repo := https://github.com/Dasharo/ec +dasharo-ec_commit_hash := d198b641195e60e13afc17be9464e4f402d1c2fa + +# Map BOARD to the EC board model +ifeq "$(BOARD)" "novacustom-v540tu" + DASHARO_EC_BOARD_MODEL := v540tu +else ifeq "$(BOARD)" "novacustom-v560tu" + DASHARO_EC_BOARD_MODEL := v560tu +else + $(error "$(BOARD): no Dasharo EC board model mapping defined") +endif + +dasharo-ec_version := $(dasharo-ec_commit_hash) +dasharo-ec_base_dir := dasharo-ec-$(dasharo-ec_version) +dasharo-ec_dir := dasharo-ec-$(dasharo-ec_version) + +# Use .built sentinel since the real output is in a dynamic path +dasharo-ec_output := .built + +# No-op configure: submodules are handled by the EC Makefile's canary rule +# for git repos +dasharo-ec_configure := + +# Build the EC firmware following the upstream build.sh process: +# 1. make BOARD=novacustom/ (compile with SDCC) +# 2. Copy ec.rom from the dynamic output path to a known location +# 3. Extend ec.rom to 128KB (zero-padded) as required by coreboot +# Note: the && chain after make -C runs in the parent cwd, so use +# absolute paths. Use sh -c so the shell expands the glob. +dasharo-ec_target := \ + BOARD=novacustom/$(DASHARO_EC_BOARD_MODEL) \ + && sh -c 'cp $(build)/$(dasharo-ec_dir)/build/novacustom/$(DASHARO_EC_BOARD_MODEL)/*/ec.rom $(build)/$(dasharo-ec_dir)/ec.rom' \ + && dd if=/dev/zero of=$(build)/$(dasharo-ec_dir)/ec.rom bs=1 seek=128k count=0 \ + && touch $(build)/$(dasharo-ec_dir)/.built + +# Copy ec.rom into the coreboot source tree before coreboot configures. +# coreboot expects ec.rom in its root directory. +$(build)/$(coreboot_base_dir)/ec.rom: $(build)/$(dasharo-ec_dir)/.build + $(call do,COPY,ec.rom -> coreboot, \ + cp "$(build)/$(dasharo-ec_dir)/ec.rom" "$@" \ + ) + +# Ensure coreboot's configure step depends on ec.rom being present +$(build)/$(coreboot_dir)/.configured: $(build)/$(coreboot_base_dir)/ec.rom + +endif From b63f9e577523071994502343390294a2274a61ae Mon Sep 17 00:00:00 2001 From: Maciej Pijanowski Date: Fri, 27 Feb 2026 15:12:26 +0100 Subject: [PATCH 02/25] toolchain: add sdcc and xxd Required to to build dasharo-ec module. Need to pin SDCC version to 4.2.0 to avoid https://github.com/Dasharo/dasharo-issues/issues/1785 and be in sync with ec-sdk: https://github.com/Dasharo/ec-sdk/pull/2 Using 3.8.0 in nix toolchain (as originally used in ec-sdk) was not feasible: https://github.com/linuxboot/heads/pull/2062#issue-4001232463 Signed-off-by: Maciej Pijanowski --- flake.lock | 19 ++++++++++++++++++- flake.nix | 8 ++++++++ 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/flake.lock b/flake.lock index f1f0771ca..3f671b431 100644 --- a/flake.lock +++ b/flake.lock @@ -34,10 +34,27 @@ "type": "github" } }, + "nixpkgs-sdcc": { + "locked": { + "lastModified": 1706220439, + "narHash": "sha256-JMPlh3WoVVOSFSGdetBDKKkKkLNwnTqewFn+g1v2n/A=", + "owner": "nixos", + "repo": "nixpkgs", + "rev": "7a339d87931bba829f68e94621536cad9132971a", + "type": "github" + }, + "original": { + "owner": "nixos", + "repo": "nixpkgs", + "rev": "7a339d87931bba829f68e94621536cad9132971a", + "type": "github" + } + }, "root": { "inputs": { "flake-utils": "flake-utils", - "nixpkgs": "nixpkgs" + "nixpkgs": "nixpkgs", + "nixpkgs-sdcc": "nixpkgs-sdcc" } }, "systems": { diff --git a/flake.nix b/flake.nix index 0b985424a..bd0c226bf 100644 --- a/flake.nix +++ b/flake.nix @@ -4,6 +4,10 @@ # Inputs define external dependencies and their sources. inputs = { nixpkgs.url = "github:nixos/nixpkgs/nixos-unstable"; # Using the unstable channel for the latest packages, while flake.lock fixates the commit reused until changed. + # No flake for 3.8.0 + # Pinned nixpkgs for sdcc 4.2.0 - matches: https://github.com/Dasharo/ec-sdk/pull/2 + # sdcc 4.5.0 has optimizer bug: https://github.com/Dasharo/dasharo-issues/issues/1785 + nixpkgs-sdcc.url = "github:nixos/nixpkgs/7a339d87931bba829f68e94621536cad9132971a"; flake-utils.url = "github:numtide/flake-utils"; # Utilities for flake functionality. }; # Outputs are the result of the flake, including the development environment and Docker image. @@ -11,10 +15,12 @@ self, flake-utils, nixpkgs, + nixpkgs-sdcc, ... }: flake-utils.lib.eachDefaultSystem (system: let pkgs = nixpkgs.legacyPackages.${system}; # Accessing the legacy package set. + pkgs-sdcc = nixpkgs-sdcc.legacyPackages.${system}; # Pinned for sdcc 4.2.0 lib = pkgs.lib; # The standard Nix packages library. # Dependencies are the packages required for the Heads project. @@ -63,11 +69,13 @@ psmisc #process tools like killall, pstree, etc python3 # me_cleaner, coreboot rsync # coreboot + pkgs-sdcc.sdcc # Dasharo EC build — pinned to 4.2.0 (matches Debian oldstable, 4.5 has optimizer bug) sharutils texinfo unzip wget which + xxd # Dasharo EC build xz zip zlib From 60d8fa679f627f2a2c0f869f8a69091bba2422df Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Fri, 27 Feb 2026 12:52:43 -0500 Subject: [PATCH 03/25] Prepare nix based docker image to be bumped to v0.2.9 to include minimal changes to build Dasharo-EC Signed-off-by: Thierry Laurion --- .circleci/config.yml | 16 ++++++++-------- docker/DOCKER_REPRO_DIGEST | 4 ++-- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/.circleci/config.yml b/.circleci/config.yml index 4f3f8256b..b64561d01 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -48,8 +48,8 @@ commands: jobs: prep_env: docker: - # Docker image: tlaurion/heads-dev-env:v0.2.7 - - image: tlaurion/heads-dev-env@sha256:5f890f3d1b6b57f9e567191695df003a2ee880f084f5dfe7a5633e3e8f937479 + # Docker image: tlaurion/heads-dev-env:v0.2.9 + - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de resource_class: large working_directory: ~/heads steps: @@ -124,8 +124,8 @@ jobs: build_and_persist: docker: - # Docker image: tlaurion/heads-dev-env:v0.2.7 - - image: tlaurion/heads-dev-env@sha256:5f890f3d1b6b57f9e567191695df003a2ee880f084f5dfe7a5633e3e8f937479 + # Docker image: tlaurion/heads-dev-env:v0.2.9 + - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de resource_class: large working_directory: ~/heads parameters: @@ -153,8 +153,8 @@ jobs: build: docker: - # Docker image: tlaurion/heads-dev-env:v0.2.7 - - image: tlaurion/heads-dev-env@sha256:5f890f3d1b6b57f9e567191695df003a2ee880f084f5dfe7a5633e3e8f937479 + # Docker image: tlaurion/heads-dev-env:v0.2.9 + - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de resource_class: large working_directory: ~/heads parameters: @@ -175,8 +175,8 @@ jobs: save_cache: docker: - # Docker image: tlaurion/heads-dev-env:v0.2.7 - - image: tlaurion/heads-dev-env@sha256:5f890f3d1b6b57f9e567191695df003a2ee880f084f5dfe7a5633e3e8f937479 + # Docker image: tlaurion/heads-dev-env:v0.2.9 + - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de resource_class: large working_directory: ~/heads steps: diff --git a/docker/DOCKER_REPRO_DIGEST b/docker/DOCKER_REPRO_DIGEST index 7e1624946..95c2adc21 100644 --- a/docker/DOCKER_REPRO_DIGEST +++ b/docker/DOCKER_REPRO_DIGEST @@ -9,5 +9,5 @@ # sha256:aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa # Place the digest on the first non-comment line below (remove the leading '#') -# Version: v0.2.7 -sha256:5f890f3d1b6b57f9e567191695df003a2ee880f084f5dfe7a5633e3e8f937479 +# Version: v0.2.9 +sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de From 1da1766cdde609ec61afdc72af6b6224305ecf09 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Wed, 8 Apr 2026 12:48:44 +0200 Subject: [PATCH 04/25] modules/dasharo-ec: fix build system and address review feedback MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Remove leading tabs from ifeq variable assignments (Make parse error) - Move post-build steps (cp, dd, touch) out of dasharo-ec_target into a proper Make rule; _target is now only make arguments - Set dasharo-ec_output to ec.rom (the actual artifact, not .built) - Add -$(BOARD) suffix to dasharo-ec_base_dir and dasharo-ec_dir so v540tu and v560tu maintain independent build trees and ec.rom files - Add explicit rule to copy and zero-pad ec.rom to 128 KB - Fix coreboot copy rule: use FORCE + cmp so the recipe always runs but only updates the destination (and its mtime) when content differs, preventing the mtime race between boards sharing coreboot_base_dir Signed-off-by: Filip Lewiński --- modules/dasharo-ec | 53 ++++++++++++++++++++++++---------------------- 1 file changed, 28 insertions(+), 25 deletions(-) diff --git a/modules/dasharo-ec b/modules/dasharo-ec index 041283c0b..1675ea363 100644 --- a/modules/dasharo-ec +++ b/modules/dasharo-ec @@ -7,42 +7,45 @@ dasharo-ec_commit_hash := d198b641195e60e13afc17be9464e4f402d1c2fa # Map BOARD to the EC board model ifeq "$(BOARD)" "novacustom-v540tu" - DASHARO_EC_BOARD_MODEL := v540tu +DASHARO_EC_BOARD_MODEL := v540tu else ifeq "$(BOARD)" "novacustom-v560tu" - DASHARO_EC_BOARD_MODEL := v560tu +DASHARO_EC_BOARD_MODEL := v560tu else - $(error "$(BOARD): no Dasharo EC board model mapping defined") +$(error "$(BOARD): no Dasharo EC board model mapping defined") endif dasharo-ec_version := $(dasharo-ec_commit_hash) -dasharo-ec_base_dir := dasharo-ec-$(dasharo-ec_version) -dasharo-ec_dir := dasharo-ec-$(dasharo-ec_version) +dasharo-ec_base_dir := dasharo-ec-$(dasharo-ec_version)-$(BOARD) +dasharo-ec_dir := dasharo-ec-$(dasharo-ec_version)-$(BOARD) -# Use .built sentinel since the real output is in a dynamic path -dasharo-ec_output := .built +# ec.rom is copied to a stable path by the explicit rule below +dasharo-ec_output := ec.rom # No-op configure: submodules are handled by the EC Makefile's canary rule # for git repos dasharo-ec_configure := -# Build the EC firmware following the upstream build.sh process: -# 1. make BOARD=novacustom/ (compile with SDCC) -# 2. Copy ec.rom from the dynamic output path to a known location -# 3. Extend ec.rom to 128KB (zero-padded) as required by coreboot -# Note: the && chain after make -C runs in the parent cwd, so use -# absolute paths. Use sh -c so the shell expands the glob. -dasharo-ec_target := \ - BOARD=novacustom/$(DASHARO_EC_BOARD_MODEL) \ - && sh -c 'cp $(build)/$(dasharo-ec_dir)/build/novacustom/$(DASHARO_EC_BOARD_MODEL)/*/ec.rom $(build)/$(dasharo-ec_dir)/ec.rom' \ - && dd if=/dev/zero of=$(build)/$(dasharo-ec_dir)/ec.rom bs=1 seek=128k count=0 \ - && touch $(build)/$(dasharo-ec_dir)/.built - -# Copy ec.rom into the coreboot source tree before coreboot configures. -# coreboot expects ec.rom in its root directory. -$(build)/$(coreboot_base_dir)/ec.rom: $(build)/$(dasharo-ec_dir)/.build - $(call do,COPY,ec.rom -> coreboot, \ - cp "$(build)/$(dasharo-ec_dir)/ec.rom" "$@" \ - ) +# Build the EC firmware: only pass make arguments; post-build steps are +# handled by the explicit rule below. +dasharo-ec_target := BOARD=novacustom/$(DASHARO_EC_BOARD_MODEL) + +# Copy ec.rom from the dynamic build path to a stable location and pad to +# 128KB as required by coreboot. Runs after the module make completes. +$(build)/$(dasharo-ec_dir)/ec.rom: $(build)/$(dasharo-ec_dir)/.build + sh -c 'cp $(build)/$(dasharo-ec_dir)/build/novacustom/$(DASHARO_EC_BOARD_MODEL)/*/ec.rom $@' + dd if=/dev/zero of=$@ bs=1 seek=128k count=0 + +# Copy ec.rom into the coreboot source tree before coreboot builds. +# coreboot_base_dir (coreboot-dasharo) is shared between v540tu and v560tu, so +# a plain timestamp-based rule is racy: whichever board built last wins the mtime +# race and the other board silently keeps the wrong binary. Adding FORCE makes the +# recipe always run so we can do a content check; the actual cp (and the mtime +# update that triggers downstream rebuilds) only happens when the content differs. +$(build)/$(coreboot_base_dir)/ec.rom: $(build)/$(dasharo-ec_dir)/ec.rom FORCE + @if ! cmp -s "$(build)/$(dasharo-ec_dir)/ec.rom" "$@" 2>/dev/null; then \ + echo "$(DATE) COPY $(DASHARO_EC_BOARD_MODEL) ec.rom -> coreboot"; \ + cp "$(build)/$(dasharo-ec_dir)/ec.rom" "$@"; \ + fi # Ensure coreboot's configure step depends on ec.rom being present $(build)/$(coreboot_dir)/.configured: $(build)/$(coreboot_base_dir)/ec.rom From 85a7077bd996b45fffcc70b96110001c6b3284e5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Tue, 14 Apr 2026 09:06:09 +0200 Subject: [PATCH 05/25] modules/dasharo-ec: address review feedback and add nv4x_adl/ns50 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - config/coreboot-novacustom-v560tu.config: switch EC from SYSTEM76_EC to DASHARO_EC (CONFIG_EC_DASHARO_EC=y, _UPDATE=y, _UPDATE_FILE="ec.rom"), matching the v540tu change already in this branch - modules/dasharo-ec: strip UNTESTED_/EOL_ board name prefixes before the board model mapping so that boards not yet promoted (e.g. UNTESTED_nitropad-ns50) resolve correctly without a separate entry - modules/dasharo-ec: add board model mappings for novacustom-nv4x_adl (ns5x_adl - nv4x_adl) and nitropad-ns50 (ns5x_adl) - modules/dasharo-ec: drop redundant sh -c wrapper from cp recipe; Make already invokes recipe lines via the shell - modules/dasharo-ec: replace dd seek-based padding with truncate --size=128KiB, as suggested in review (ec.rom is always smaller than 128 KiB) - modules/dasharo-ec: indent ifeq variable assignments with a tab for readability Signed-off-by: Filip Lewiński --- config/coreboot-novacustom-v560tu.config | 5 +++-- modules/dasharo-ec | 21 ++++++++++++++------- 2 files changed, 17 insertions(+), 9 deletions(-) diff --git a/config/coreboot-novacustom-v560tu.config b/config/coreboot-novacustom-v560tu.config index 66a6a530d..403ecc76c 100644 --- a/config/coreboot-novacustom-v560tu.config +++ b/config/coreboot-novacustom-v560tu.config @@ -543,8 +543,9 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y -CONFIG_EC_SYSTEM76_EC=y -# CONFIG_EC_SYSTEM76_EC_UPDATE is not set +CONFIG_EC_DASHARO_EC=y +CONFIG_EC_DASHARO_EC_UPDATE=y +CONFIG_EC_DASHARO_EC_UPDATE_FILE="ec.rom" # # Intel Firmware diff --git a/modules/dasharo-ec b/modules/dasharo-ec index 1675ea363..31ef78e93 100644 --- a/modules/dasharo-ec +++ b/modules/dasharo-ec @@ -5,13 +5,20 @@ modules-y += dasharo-ec dasharo-ec_repo := https://github.com/Dasharo/ec dasharo-ec_commit_hash := d198b641195e60e13afc17be9464e4f402d1c2fa +# Strip UNTESTED_/EOL_ prefix for board model mapping +_DASHARO_EC_BOARD := $(patsubst EOL_%,%,$(patsubst UNTESTED_%,%,$(BOARD))) + # Map BOARD to the EC board model -ifeq "$(BOARD)" "novacustom-v540tu" -DASHARO_EC_BOARD_MODEL := v540tu -else ifeq "$(BOARD)" "novacustom-v560tu" -DASHARO_EC_BOARD_MODEL := v560tu +ifeq "$(_DASHARO_EC_BOARD)" "novacustom-v540tu" + DASHARO_EC_BOARD_MODEL := v540tu +else ifeq "$(_DASHARO_EC_BOARD)" "novacustom-v560tu" + DASHARO_EC_BOARD_MODEL := v560tu +else ifeq "$(_DASHARO_EC_BOARD)" "novacustom-nv4x_adl" + DASHARO_EC_BOARD_MODEL := nv4x_adl +else ifeq "$(_DASHARO_EC_BOARD)" "nitropad-ns50" + DASHARO_EC_BOARD_MODEL := ns5x_adl else -$(error "$(BOARD): no Dasharo EC board model mapping defined") + $(error "$(BOARD): no Dasharo EC board model mapping defined") endif dasharo-ec_version := $(dasharo-ec_commit_hash) @@ -32,8 +39,8 @@ dasharo-ec_target := BOARD=novacustom/$(DASHARO_EC_BOARD_MODEL) # Copy ec.rom from the dynamic build path to a stable location and pad to # 128KB as required by coreboot. Runs after the module make completes. $(build)/$(dasharo-ec_dir)/ec.rom: $(build)/$(dasharo-ec_dir)/.build - sh -c 'cp $(build)/$(dasharo-ec_dir)/build/novacustom/$(DASHARO_EC_BOARD_MODEL)/*/ec.rom $@' - dd if=/dev/zero of=$@ bs=1 seek=128k count=0 + cp $(build)/$(dasharo-ec_dir)/build/novacustom/$(DASHARO_EC_BOARD_MODEL)/*/ec.rom $@ + truncate --size=128KiB $@ # Copy ec.rom into the coreboot source tree before coreboot builds. # coreboot_base_dir (coreboot-dasharo) is shared between v540tu and v560tu, so From 93ad3bfd61f1832e0b29448b511c58b90717b73f Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Thu, 4 Dec 2025 15:46:28 -0500 Subject: [PATCH 06/25] Makefile: Auto-clean board build directories when coreboot canary changes When the coreboot git commit changes (canary mismatch), remove and recreate the board-specific build directories to prevent stale artifacts from causing compilation failures. This eliminates the need for manual `rm -rf build/x86/BOARD` before rebuilding after coreboot canary updates in development cycles (when creating patches). One currently still has to, eg: echo "bogues repo url + commit hash" | sudo tee /home/user/heads/build/x86/coreboot-25.09/.canary Current logic then: 1. Detects canary changes and triggers repository cleanup 2. Removes both Heads board directory (build/x86/BOARD) and coreboot board directory (build/x86/coreboot-*/BOARD) that contain stale build artifacts 3. Recreates empty board directories for the subsequent build 4. Allows patches to apply cleanly without Ada compilation errors This ensures Ada builds work correctly after coreboot updates without manual intervention (resync repo, apply patches, clean artifact dirs and rebuilds only what changed). Signed-off-by: Thierry Laurion --- Makefile | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Makefile b/Makefile index d8d92bd1f..d2e4bd966 100644 --- a/Makefile +++ b/Makefile @@ -492,6 +492,10 @@ define define_module = git -C "$(build)/$($1_base_dir)" submodule sync && \ echo "INFO: Updating submodules (init and checkout)" && \ git -C "$(build)/$($1_base_dir)" submodule update --init --checkout && \ + echo "INFO: Cleaning board-specific build directories to prevent stale artifacts" && \ + rm -rf "$(build)/$(BOARD)" "$(build)/$($1_base_dir)/$(BOARD)" && \ + echo "INFO: Recreating board directories" && \ + mkdir -p "$(build)/$(BOARD)" "$(build)/$($1_base_dir)/$(BOARD)" && \ echo "INFO: Updating .canary file with new repo info" && \ echo -n '$($1_repo)|$($1_commit_hash)' > "$$@" ; \ fi From 88684f76d70bcbb9594b90192aa5307849a7fda5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Thu, 9 Apr 2026 17:43:00 +0200 Subject: [PATCH 07/25] MTL release: coreboot revision and updated configs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Filip Lewiński --- config/coreboot-novacustom-v540tu.config | 197 ++++++++++++----------- config/coreboot-novacustom-v560tu.config | 197 ++++++++++++----------- modules/coreboot | 2 +- 3 files changed, 211 insertions(+), 185 deletions(-) diff --git a/config/coreboot-novacustom-v540tu.config b/config/coreboot-novacustom-v540tu.config index 44da03805..51754757c 100644 --- a/config/coreboot-novacustom-v540tu.config +++ b/config/coreboot-novacustom-v540tu.config @@ -6,14 +6,13 @@ # # General setup # -CONFIG_COREBOOT_BUILD=y -CONFIG_LOCALVERSION="v0.9.0-rc2" +CONFIG_LOCALVERSION="v1.0.1" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set @@ -37,11 +36,11 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_UPDATE_IMAGE is not set CONFIG_BOOTSPLASH_IMAGE=y CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_REGION_LOGO_FILE="" CONFIG_BOOTSPLASH_CONVERT=y CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_BOOTSPLASH_CONVERT_RESIZE is not set # CONFIG_BOOTSPLASH_CONVERT_COLORSWAP is not set -# CONFIG_FW_CONFIG is not set # # Software Bill Of Materials (SBOM) @@ -59,23 +58,27 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # # CONFIG_VENDOR_51NB is not set # CONFIG_VENDOR_ACER is not set -# CONFIG_VENDOR_ADLINK is not set # CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set # CONFIG_VENDOR_BOSTENTECH is not set # CONFIG_VENDOR_BYTEDANCE is not set # CONFIG_VENDOR_CAVIUM is not set -CONFIG_VENDOR_CLEVO=y +# CONFIG_VENDOR_CLEVO is not set # CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set @@ -86,10 +89,12 @@ CONFIG_VENDOR_CLEVO=y # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set -# CONFIG_VENDOR_NOVACUSTOM is not set +CONFIG_VENDOR_NOVACUSTOM=y # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -99,6 +104,7 @@ CONFIG_VENDOR_CLEVO=y # CONFIG_VENDOR_PRODRIVE is not set # CONFIG_VENDOR_PROTECTLI is not set # CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set # CONFIG_VENDOR_RAZER is not set # CONFIG_VENDOR_RODA is not set # CONFIG_VENDOR_SAMSUNG is not set @@ -109,16 +115,18 @@ CONFIG_VENDOR_CLEVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="Not Applicable" CONFIG_MAINBOARD_PART_NUMBER="V54x_6x_TU" CONFIG_MAINBOARD_VERSION="V540TU" -CONFIG_MAINBOARD_DIR="clevo/mtl-h" +CONFIG_MAINBOARD_DIR="novacustom/mtl-h" CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=1024 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="Clevo" +CONFIG_MAINBOARD_VENDOR="Notebook" CONFIG_CBFS_SIZE=0x1000000 # CONFIG_CONSOLE_SERIAL is not set CONFIG_MAX_CPUS=22 @@ -126,96 +134,94 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y # CONFIG_POST_DEVICE is not set # CONFIG_POST_IO is not set CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="igpu" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_VBOOT_VBNV_OFFSET=0x28 -CONFIG_VARIANT_DIR="igpu" -CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" # CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Notebook" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x2000 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="V54x_6x_TU" +# CONFIG_CONSOLE_POST is not set +CONFIG_FSP_FD_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Fsp.fd" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 - -# -# Alder Lake P -# -# CONFIG_BOARD_CLEVO_NS50PU is not set -# CONFIG_BOARD_CLEVO_NV40PZ is not set - -# -# Comet Lake U -# -# CONFIG_BOARD_CLEVO_L140CU is not set - -# -# Kaby Lake U -# -# CONFIG_BOARD_CLEVO_N130WU is not set - -# -# Meteor Lake H -# -# CONFIG_BOARD_CLEVO_V540TNX is not set -# CONFIG_BOARD_CLEVO_V560TNX is not set -CONFIG_BOARD_CLEVO_V540TU=y -# CONFIG_BOARD_CLEVO_V560TU is not set - -# -# Tiger Lake U -# -# CONFIG_BOARD_CLEVO_L140MU is not set -# CONFIG_BOARD_CLEVO_NV40MZ is not set -# CONFIG_BOARD_CLEVO_NS50MU is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="V54x_6x_TU" -# CONFIG_CONSOLE_POST is not set # CONFIG_USE_PM_ACPI_TIMER is not set CONFIG_TPM_PIRQ=0x61 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)" -CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y -CONFIG_BOARD_CLEVO_MTLH_COMMON=y -CONFIG_BOARD_CLEVO_V5X0TU_BASE=y -CONFIG_EC_SYSTEM76_EC_FLASH_SIZE=0x40000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_DEBUG_SMI is not set +CONFIG_EC_DASHARO_EC_BAT_THRESHOLDS=y +CONFIG_PXE_ROM_ID="8086,550a" CONFIG_DCACHE_RAM_BASE=0xfef00000 CONFIG_DCACHE_RAM_SIZE=0xc0000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x80400 +CONFIG_DCACHE_BSP_STACK_SIZE=0x88000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y +# CONFIG_USE_LEGACY_8254_TIMER is not set CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/descriptor.bin" CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/me.bin" -CONFIG_GBE_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/gbe.bin" -CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x200000 +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x40000 CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=36 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y -# CONFIG_USE_LEGACY_8254_TIMER is not set -# CONFIG_DEBUG_SMI is not set CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=42 CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x1c000000 CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y + +# +# Alder Lake P (2022) +# +# CONFIG_BOARD_NOVACUSTOM_NS5X_ADLP is not set +# CONFIG_BOARD_NOVACUSTOM_NV4X_ADLP is not set + +# +# Meteor Lake H +# +# CONFIG_BOARD_NOVACUSTOM_V540TNX is not set +# CONFIG_BOARD_NOVACUSTOM_V560TNX is not set +CONFIG_BOARD_NOVACUSTOM_V540TU=y +# CONFIG_BOARD_NOVACUSTOM_V560TU is not set +# CONFIG_BOARD_NOVACUSTOM_NUC_BOX is not set + +# +# Tiger Lake U (2021) +# +# CONFIG_BOARD_NOVACUSTOM_NV4X_TGLU is not set +# CONFIG_BOARD_NOVACUSTOM_NS5X_TGLU is not set +CONFIG_BOARD_NOVACUSTOM_MTLH_COMMON=y +CONFIG_BOARD_NOVACUSTOM_V5X0TU_BASE=y +CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x40000 +CONFIG_EC_DASHARO_EC_CPU_FAN_COUNT=2 CONFIG_D3COLD_SUPPORT=y -CONFIG_PCIEXP_ASPM=y -CONFIG_PCIEXP_L1_SUB_STATE=y -CONFIG_PCIEXP_CLK_PM=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 CONFIG_FSP_TEMP_RAM_SIZE=0x20000 +CONFIG_HEAP_SIZE=0x100000 CONFIG_EC_GPE_SCI=0x50 -CONFIG_TPM_MEASURED_BOOT=y +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" CONFIG_BOARD_ROMSIZE_KB_32768=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set @@ -287,17 +293,19 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=6 CONFIG_SOC_INTEL_UART_DEV_MAX=3 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff -CONFIG_FSP_HEADER_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Include/" -CONFIG_FSP_FD_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Fsp.fd" +CONFIG_FSP_TYPE_IOT=y +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Include" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 CONFIG_DATA_BUS_WIDTH=128 CONFIG_DIMMS_PER_CHANNEL=2 CONFIG_MRC_CHANNEL_WIDTH=16 -CONFIG_BUILDING_WITH_DEBUG_FSP=y CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258 CONFIG_INTEL_GMA_BCLV_WIDTH=32 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254 CONFIG_INTEL_GMA_BCLM_WIDTH=32 CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_MAX_HECI_DEVICES=6 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_HAVE_PAM0_REGISTER=y @@ -308,17 +316,17 @@ CONFIG_SOC_INTEL_METEORLAKE_U_H=y CONFIG_SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT=y CONFIG_METEORLAKE_CAR_ENHANCED_NEM=y CONFIG_CPU_MAX_TEMPERATURE=110 -CONFIG_IOE_PCR_BASE_ADDRESS=0x60000000 +CONFIG_IOE_PCR_BASE_ADDRESS=0x3fff0000000 CONFIG_SOC_INTEL_USB2_DEV_MAX=10 CONFIG_SOC_INTEL_USB3_DEV_MAX=2 -CONFIG_SOC_INTEL_METEORLAKE_DEBUG_CONSENT=0 CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x800000 CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x100f CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x100f CONFIG_IOE_DIE_CLOCK_START=6 CONFIG_SOC_INTEL_CSE_FW_PARTITION_CMOS_OFFSET=161 -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=42 +CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y +CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_INTEL_TME=y CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -346,6 +354,7 @@ CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y CONFIG_INTEL_CAR_NEM_ENHANCED=y +CONFIG_INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE=y CONFIG_CAR_HAS_SF_MASKS=y CONFIG_COS_MAPPED_TO_MSB=y CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y @@ -439,6 +448,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y # CONFIG_TCSS_HAS_USBC_OPS is not set CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y @@ -501,7 +512,6 @@ CONFIG_DEFAULT_X2APIC_LATE_WORKAROUND=y CONFIG_X2APIC_LATE_WORKAROUND=y CONFIG_UDELAY_TSC=y CONFIG_TSC_MONOTONIC_TIMER=y -CONFIG_X86_CLFLUSH_CAR=y CONFIG_HAVE_SMI_HANDLER=y CONFIG_SMM_TSEG=y CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 @@ -530,7 +540,7 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y -# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y # CONFIG_INTEL_CHIPSET_LOCKDOWN is not set CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -550,7 +560,7 @@ CONFIG_EC_DASHARO_EC_UPDATE_FILE="ec.rom" # # Intel Firmware # -# CONFIG_IFDTOOL_DISABLE_ME is not set +CONFIG_IFDTOOL_DISABLE_ME=y CONFIG_HAVE_ME_BIN=y # CONFIG_STITCH_ME_BIN is not set # CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set @@ -560,7 +570,7 @@ CONFIG_INTEL_ME_DISABLED_HAP=y # CONFIG_INTEL_ME_ENABLED is not set CONFIG_INTEL_ME_DEFAULT_STATE=2 CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y -CONFIG_HAVE_GBE_BIN=y +# CONFIG_HAVE_GBE_BIN is not set # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y @@ -574,16 +584,19 @@ CONFIG_BIOS_VENDOR="3mdeb" # Dasharo Configuration # CONFIG_DASHARO_PREFER_S3_SLEEP=y -CONFIG_DASHARO_FIRMWARE_UPDATE_MODE=y +# CONFIG_DASHARO_FIRMWARE_UPDATE_MODE is not set # end of Dasharo Configuration +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_UDK_BASE=y # CONFIG_UDK_202005_BINDING is not set CONFIG_UDK_202302_BINDING=y CONFIG_UDK_2013_VERSION=2013 CONFIG_UDK_2017_VERSION=2017 CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 CONFIG_UDK_VERSION=202302 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y @@ -609,6 +622,10 @@ CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -627,21 +644,19 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y CONFIG_BOOTSPLASH=y +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_AZALIA_HDA_CODEC_SUPPORT=y -CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y CONFIG_ECAM_MMCONF_LENGTH=0x10000000 CONFIG_PCI_ALLOW_BUS_MASTER=y CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y -CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y -CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR=y -CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y CONFIG_PCIEXP_HOTPLUG_IO=0x800 # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 @@ -658,10 +673,12 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y CONFIG_MRC_CACHE_USING_MRC_VERSION=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -669,7 +686,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y -CONFIG_TPM_PPI=y CONFIG_DRIVERS_UART=y CONFIG_NO_UART_ON_SUPERIO=y CONFIG_DRIVERS_UART_8250MEM=y @@ -685,6 +701,7 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y CONFIG_DRIVERS_I2C_GENERIC=y CONFIG_DRIVERS_I2C_HID=y # CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_FSP_USE_REPO=y # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set # CONFIG_BMP_LOGO is not set @@ -693,8 +710,8 @@ CONFIG_PLATFORM_USES_FSP2_1=y CONFIG_PLATFORM_USES_FSP2_2=y CONFIG_PLATFORM_USES_FSP2_3=y CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_FSP_S_CBFS="fsps.bin" CONFIG_FSP_M_CBFS="fspm.bin" CONFIG_FSP_FULL_FD=y @@ -703,26 +720,26 @@ CONFIG_FSP_M_XIP=y CONFIG_FSP_USES_CB_STACK=y CONFIG_HAVE_FSP_LOGO_SUPPORT=y CONFIG_FSP_COMPRESS_FSP_S_LZ4=y -CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y -CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_FSPS_HAS_ARCH_UPD=y CONFIG_FSPS_USE_MULTI_PHASE_INIT=y CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +CONFIG_FSP_UGOP_EARLY_SIGN_OF_LIFE=y CONFIG_FSP_ENABLE_SERIAL_DEBUG=y +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set CONFIG_INTEL_GMA_ACPI=y -CONFIG_VBT_CBFS_COMPRESSION_LZMA=y -# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +CONFIG_VBT_CBFS_COMPRESSION_DEFAULT_LZ4=y +# CONFIG_VBT_CBFS_COMPRESSION_LZMA is not set +CONFIG_VBT_CBFS_COMPRESSION_LZ4=y # CONFIG_VBT_CBFS_COMPRESSION_NONE is not set -CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lz4" CONFIG_INTEL_GMA_OPREGION_2_1=y CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set -# CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y -# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_USE_PC_CMOS_ALTCENTURY=y CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_MEMORY_MAPPED_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 @@ -759,10 +776,9 @@ CONFIG_TPM2=y CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM2=y # CONFIG_DEBUG_TPM is not set -CONFIG_TPM_RDRESP_NEED_DELAY=y # CONFIG_TPM_LOG_CB is not set +# CONFIG_TPM_LOG_TCG is not set CONFIG_TPM_LOG_TPM2=y -# CONFIG_TPM_HASH_SHA1 is not set CONFIG_TPM_HASH_SHA256=y # CONFIG_TPM_HASH_SHA384 is not set # CONFIG_TPM_HASH_SHA512 is not set @@ -781,6 +797,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set # end of Memory initialization +CONFIG_INTEL_TXT_LIB=y # CONFIG_INTEL_TXT is not set # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set @@ -804,7 +821,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y CONFIG_RTC=y -CONFIG_HEAP_SIZE=0x100000 # # Console @@ -819,7 +835,6 @@ CONFIG_CONSOLE_CBMEM=y # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set -# CONFIG_CONSOLE_SYSTEM76_EC is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set @@ -855,6 +870,7 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" # # CONFIG_PAYLOAD_NONE is not set # CONFIG_PAYLOAD_ELF is not set +# CONFIG_PAYLOAD_FLAT_BINARY is not set # CONFIG_PAYLOAD_BOOTBOOT is not set # CONFIG_PAYLOAD_FILO is not set # CONFIG_PAYLOAD_GRUB2 is not set @@ -865,7 +881,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" # CONFIG_PAYLOAD_EDK2 is not set CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" -CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" @@ -874,7 +889,6 @@ CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" # # end of Dasharo specific payload options -# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -919,7 +933,6 @@ CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set CONFIG_HAVE_DEBUG_GPIO=y # CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_CBFS is not set diff --git a/config/coreboot-novacustom-v560tu.config b/config/coreboot-novacustom-v560tu.config index 403ecc76c..3a46936fe 100644 --- a/config/coreboot-novacustom-v560tu.config +++ b/config/coreboot-novacustom-v560tu.config @@ -6,14 +6,13 @@ # # General setup # -CONFIG_COREBOOT_BUILD=y -CONFIG_LOCALVERSION="v0.9.0-rc2" +CONFIG_LOCALVERSION="v1.0.1" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set @@ -37,11 +36,11 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_UPDATE_IMAGE is not set CONFIG_BOOTSPLASH_IMAGE=y CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_REGION_LOGO_FILE="" CONFIG_BOOTSPLASH_CONVERT=y CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_BOOTSPLASH_CONVERT_RESIZE is not set # CONFIG_BOOTSPLASH_CONVERT_COLORSWAP is not set -# CONFIG_FW_CONFIG is not set # # Software Bill Of Materials (SBOM) @@ -59,23 +58,27 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # # CONFIG_VENDOR_51NB is not set # CONFIG_VENDOR_ACER is not set -# CONFIG_VENDOR_ADLINK is not set # CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set # CONFIG_VENDOR_BOSTENTECH is not set # CONFIG_VENDOR_BYTEDANCE is not set # CONFIG_VENDOR_CAVIUM is not set -CONFIG_VENDOR_CLEVO=y +# CONFIG_VENDOR_CLEVO is not set # CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set @@ -86,10 +89,12 @@ CONFIG_VENDOR_CLEVO=y # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set -# CONFIG_VENDOR_NOVACUSTOM is not set +CONFIG_VENDOR_NOVACUSTOM=y # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -99,6 +104,7 @@ CONFIG_VENDOR_CLEVO=y # CONFIG_VENDOR_PRODRIVE is not set # CONFIG_VENDOR_PROTECTLI is not set # CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set # CONFIG_VENDOR_RAZER is not set # CONFIG_VENDOR_RODA is not set # CONFIG_VENDOR_SAMSUNG is not set @@ -109,16 +115,18 @@ CONFIG_VENDOR_CLEVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="Not Applicable" CONFIG_MAINBOARD_PART_NUMBER="V54x_6x_TU" CONFIG_MAINBOARD_VERSION="V560TU" -CONFIG_MAINBOARD_DIR="clevo/mtl-h" +CONFIG_MAINBOARD_DIR="novacustom/mtl-h" CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=1024 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="Clevo" +CONFIG_MAINBOARD_VENDOR="Notebook" CONFIG_CBFS_SIZE=0x1000000 # CONFIG_CONSOLE_SERIAL is not set CONFIG_MAX_CPUS=22 @@ -126,96 +134,94 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y # CONFIG_POST_DEVICE is not set # CONFIG_POST_IO is not set CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="igpu" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_VBOOT_VBNV_OFFSET=0x28 -CONFIG_VARIANT_DIR="igpu" -CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" # CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Notebook" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x2000 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="V54x_6x_TU" +# CONFIG_CONSOLE_POST is not set +CONFIG_FSP_FD_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Fsp.fd" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 - -# -# Alder Lake P -# -# CONFIG_BOARD_CLEVO_NS50PU is not set -# CONFIG_BOARD_CLEVO_NV40PZ is not set - -# -# Comet Lake U -# -# CONFIG_BOARD_CLEVO_L140CU is not set - -# -# Kaby Lake U -# -# CONFIG_BOARD_CLEVO_N130WU is not set - -# -# Meteor Lake H -# -# CONFIG_BOARD_CLEVO_V540TNX is not set -# CONFIG_BOARD_CLEVO_V560TNX is not set -# CONFIG_BOARD_CLEVO_V540TU is not set -CONFIG_BOARD_CLEVO_V560TU=y - -# -# Tiger Lake U -# -# CONFIG_BOARD_CLEVO_L140MU is not set -# CONFIG_BOARD_CLEVO_NV40MZ is not set -# CONFIG_BOARD_CLEVO_NS50MU is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="V54x_6x_TU" -# CONFIG_CONSOLE_POST is not set # CONFIG_USE_PM_ACPI_TIMER is not set CONFIG_TPM_PIRQ=0x61 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)" -CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y -CONFIG_BOARD_CLEVO_MTLH_COMMON=y -CONFIG_BOARD_CLEVO_V5X0TU_BASE=y -CONFIG_EC_SYSTEM76_EC_FLASH_SIZE=0x40000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_DEBUG_SMI is not set +CONFIG_EC_DASHARO_EC_BAT_THRESHOLDS=y +CONFIG_PXE_ROM_ID="8086,550a" CONFIG_DCACHE_RAM_BASE=0xfef00000 CONFIG_DCACHE_RAM_SIZE=0xc0000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x80400 +CONFIG_DCACHE_BSP_STACK_SIZE=0x88000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y +# CONFIG_USE_LEGACY_8254_TIMER is not set CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/descriptor.bin" CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/me.bin" -CONFIG_GBE_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/gbe.bin" -CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x200000 +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x40000 CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=36 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y -# CONFIG_USE_LEGACY_8254_TIMER is not set -# CONFIG_DEBUG_SMI is not set CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=42 CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x1c000000 CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y + +# +# Alder Lake P (2022) +# +# CONFIG_BOARD_NOVACUSTOM_NS5X_ADLP is not set +# CONFIG_BOARD_NOVACUSTOM_NV4X_ADLP is not set + +# +# Meteor Lake H +# +# CONFIG_BOARD_NOVACUSTOM_V540TNX is not set +# CONFIG_BOARD_NOVACUSTOM_V560TNX is not set +# CONFIG_BOARD_NOVACUSTOM_V540TU is not set +CONFIG_BOARD_NOVACUSTOM_V560TU=y +# CONFIG_BOARD_NOVACUSTOM_NUC_BOX is not set + +# +# Tiger Lake U (2021) +# +# CONFIG_BOARD_NOVACUSTOM_NV4X_TGLU is not set +# CONFIG_BOARD_NOVACUSTOM_NS5X_TGLU is not set +CONFIG_BOARD_NOVACUSTOM_MTLH_COMMON=y +CONFIG_BOARD_NOVACUSTOM_V5X0TU_BASE=y +CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x40000 +CONFIG_EC_DASHARO_EC_CPU_FAN_COUNT=2 CONFIG_D3COLD_SUPPORT=y -CONFIG_PCIEXP_ASPM=y -CONFIG_PCIEXP_L1_SUB_STATE=y -CONFIG_PCIEXP_CLK_PM=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 CONFIG_FSP_TEMP_RAM_SIZE=0x20000 +CONFIG_HEAP_SIZE=0x100000 CONFIG_EC_GPE_SCI=0x50 -CONFIG_TPM_MEASURED_BOOT=y +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" CONFIG_BOARD_ROMSIZE_KB_32768=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set @@ -287,17 +293,19 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=6 CONFIG_SOC_INTEL_UART_DEV_MAX=3 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff -CONFIG_FSP_HEADER_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Include/" -CONFIG_FSP_FD_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Fsp.fd" +CONFIG_FSP_TYPE_IOT=y +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Include" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 CONFIG_DATA_BUS_WIDTH=128 CONFIG_DIMMS_PER_CHANNEL=2 CONFIG_MRC_CHANNEL_WIDTH=16 -CONFIG_BUILDING_WITH_DEBUG_FSP=y CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258 CONFIG_INTEL_GMA_BCLV_WIDTH=32 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254 CONFIG_INTEL_GMA_BCLM_WIDTH=32 CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_MAX_HECI_DEVICES=6 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_HAVE_PAM0_REGISTER=y @@ -308,17 +316,17 @@ CONFIG_SOC_INTEL_METEORLAKE_U_H=y CONFIG_SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT=y CONFIG_METEORLAKE_CAR_ENHANCED_NEM=y CONFIG_CPU_MAX_TEMPERATURE=110 -CONFIG_IOE_PCR_BASE_ADDRESS=0x60000000 +CONFIG_IOE_PCR_BASE_ADDRESS=0x3fff0000000 CONFIG_SOC_INTEL_USB2_DEV_MAX=10 CONFIG_SOC_INTEL_USB3_DEV_MAX=2 -CONFIG_SOC_INTEL_METEORLAKE_DEBUG_CONSENT=0 CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x800000 CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x100f CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x100f CONFIG_IOE_DIE_CLOCK_START=6 CONFIG_SOC_INTEL_CSE_FW_PARTITION_CMOS_OFFSET=161 -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=42 +CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y +CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_INTEL_TME=y CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -346,6 +354,7 @@ CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y CONFIG_INTEL_CAR_NEM_ENHANCED=y +CONFIG_INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE=y CONFIG_CAR_HAS_SF_MASKS=y CONFIG_COS_MAPPED_TO_MSB=y CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y @@ -439,6 +448,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y # CONFIG_TCSS_HAS_USBC_OPS is not set CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y @@ -501,7 +512,6 @@ CONFIG_DEFAULT_X2APIC_LATE_WORKAROUND=y CONFIG_X2APIC_LATE_WORKAROUND=y CONFIG_UDELAY_TSC=y CONFIG_TSC_MONOTONIC_TIMER=y -CONFIG_X86_CLFLUSH_CAR=y CONFIG_HAVE_SMI_HANDLER=y CONFIG_SMM_TSEG=y CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 @@ -530,7 +540,7 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y -# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y # CONFIG_INTEL_CHIPSET_LOCKDOWN is not set CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -550,7 +560,7 @@ CONFIG_EC_DASHARO_EC_UPDATE_FILE="ec.rom" # # Intel Firmware # -# CONFIG_IFDTOOL_DISABLE_ME is not set +CONFIG_IFDTOOL_DISABLE_ME=y CONFIG_HAVE_ME_BIN=y # CONFIG_STITCH_ME_BIN is not set # CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set @@ -560,7 +570,7 @@ CONFIG_INTEL_ME_DISABLED_HAP=y # CONFIG_INTEL_ME_ENABLED is not set CONFIG_INTEL_ME_DEFAULT_STATE=2 CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y -CONFIG_HAVE_GBE_BIN=y +# CONFIG_HAVE_GBE_BIN is not set # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y @@ -574,16 +584,19 @@ CONFIG_BIOS_VENDOR="3mdeb" # Dasharo Configuration # CONFIG_DASHARO_PREFER_S3_SLEEP=y -CONFIG_DASHARO_FIRMWARE_UPDATE_MODE=y +# CONFIG_DASHARO_FIRMWARE_UPDATE_MODE is not set # end of Dasharo Configuration +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_UDK_BASE=y # CONFIG_UDK_202005_BINDING is not set CONFIG_UDK_202302_BINDING=y CONFIG_UDK_2013_VERSION=2013 CONFIG_UDK_2017_VERSION=2017 CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 CONFIG_UDK_VERSION=202302 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y @@ -609,6 +622,10 @@ CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -627,21 +644,19 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y CONFIG_BOOTSPLASH=y +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_AZALIA_HDA_CODEC_SUPPORT=y -CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y CONFIG_ECAM_MMCONF_LENGTH=0x10000000 CONFIG_PCI_ALLOW_BUS_MASTER=y CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y -CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y -CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR=y -CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y CONFIG_PCIEXP_HOTPLUG_IO=0x800 # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 @@ -658,10 +673,12 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y CONFIG_MRC_CACHE_USING_MRC_VERSION=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -669,7 +686,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y -CONFIG_TPM_PPI=y CONFIG_DRIVERS_UART=y CONFIG_NO_UART_ON_SUPERIO=y CONFIG_DRIVERS_UART_8250MEM=y @@ -685,6 +701,7 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y CONFIG_DRIVERS_I2C_GENERIC=y CONFIG_DRIVERS_I2C_HID=y # CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_FSP_USE_REPO=y # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set # CONFIG_BMP_LOGO is not set @@ -693,8 +710,8 @@ CONFIG_PLATFORM_USES_FSP2_1=y CONFIG_PLATFORM_USES_FSP2_2=y CONFIG_PLATFORM_USES_FSP2_3=y CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_FSP_S_CBFS="fsps.bin" CONFIG_FSP_M_CBFS="fspm.bin" CONFIG_FSP_FULL_FD=y @@ -703,26 +720,26 @@ CONFIG_FSP_M_XIP=y CONFIG_FSP_USES_CB_STACK=y CONFIG_HAVE_FSP_LOGO_SUPPORT=y CONFIG_FSP_COMPRESS_FSP_S_LZ4=y -CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y -CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_FSPS_HAS_ARCH_UPD=y CONFIG_FSPS_USE_MULTI_PHASE_INIT=y CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +CONFIG_FSP_UGOP_EARLY_SIGN_OF_LIFE=y CONFIG_FSP_ENABLE_SERIAL_DEBUG=y +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set CONFIG_INTEL_GMA_ACPI=y -CONFIG_VBT_CBFS_COMPRESSION_LZMA=y -# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +CONFIG_VBT_CBFS_COMPRESSION_DEFAULT_LZ4=y +# CONFIG_VBT_CBFS_COMPRESSION_LZMA is not set +CONFIG_VBT_CBFS_COMPRESSION_LZ4=y # CONFIG_VBT_CBFS_COMPRESSION_NONE is not set -CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lz4" CONFIG_INTEL_GMA_OPREGION_2_1=y CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set -# CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y -# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_USE_PC_CMOS_ALTCENTURY=y CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_MEMORY_MAPPED_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 @@ -759,10 +776,9 @@ CONFIG_TPM2=y CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM2=y # CONFIG_DEBUG_TPM is not set -CONFIG_TPM_RDRESP_NEED_DELAY=y # CONFIG_TPM_LOG_CB is not set +# CONFIG_TPM_LOG_TCG is not set CONFIG_TPM_LOG_TPM2=y -# CONFIG_TPM_HASH_SHA1 is not set CONFIG_TPM_HASH_SHA256=y # CONFIG_TPM_HASH_SHA384 is not set # CONFIG_TPM_HASH_SHA512 is not set @@ -781,6 +797,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set # end of Memory initialization +CONFIG_INTEL_TXT_LIB=y # CONFIG_INTEL_TXT is not set # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set @@ -804,7 +821,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y CONFIG_RTC=y -CONFIG_HEAP_SIZE=0x100000 # # Console @@ -819,7 +835,6 @@ CONFIG_CONSOLE_CBMEM=y # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set -# CONFIG_CONSOLE_SYSTEM76_EC is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set @@ -855,6 +870,7 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" # # CONFIG_PAYLOAD_NONE is not set # CONFIG_PAYLOAD_ELF is not set +# CONFIG_PAYLOAD_FLAT_BINARY is not set # CONFIG_PAYLOAD_BOOTBOOT is not set # CONFIG_PAYLOAD_FILO is not set # CONFIG_PAYLOAD_GRUB2 is not set @@ -865,7 +881,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" # CONFIG_PAYLOAD_EDK2 is not set CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" -CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" @@ -874,7 +889,6 @@ CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" # # end of Dasharo specific payload options -# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -919,7 +933,6 @@ CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set CONFIG_HAVE_DEBUG_GPIO=y # CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_CBFS is not set diff --git a/modules/coreboot b/modules/coreboot index 2a6c4e53b..38af64eb8 100644 --- a/modules/coreboot +++ b/modules/coreboot @@ -94,7 +94,7 @@ $(eval $(call coreboot_module,purism,24.02.01)) # NovaCustom NV4xPZ, NS5xPU, V560TU boards are based on Dasharo # coreboot fork, based on upstream coreboot version 24.02 coreboot-dasharo_repo := https://github.com/dasharo/coreboot -coreboot-dasharo_commit_hash := 94e5f5d5b808cf8d8fd5c70d4ef6a08a054f8986 +coreboot-dasharo_commit_hash := 6de027d1f0a62753182237ce3d793e5ba0395139 $(eval $(call coreboot_module,dasharo,24.02.01)) #coreboot-dasharo_patch_version := unreleased From 16e8d38a2bec7349bb8054c5a0f8cbb57eb1e82f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Fri, 10 Apr 2026 11:36:44 +0200 Subject: [PATCH 08/25] modules/coreboot: split dasharo base revisions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Filip Lewiński --- .../UNTESTED_msi_z690a_ddr4.config | 2 +- .../UNTESTED_msi_z690a_ddr5.config | 2 +- .../UNTESTED_msi_z790p_ddr4.config | 2 +- .../UNTESTED_nitropad-ns50.config | 2 +- boards/msi_z790p_ddr5/msi_z790p_ddr5.config | 2 +- .../novacustom-nv4x_adl.config | 2 +- .../novacustom-v540tu.config | 2 +- .../novacustom-v560tu.config | 2 +- modules/coreboot | 54 ++++++++++++++----- 9 files changed, 49 insertions(+), 21 deletions(-) diff --git a/boards/UNTESTED_msi_z690a_ddr4/UNTESTED_msi_z690a_ddr4.config b/boards/UNTESTED_msi_z690a_ddr4/UNTESTED_msi_z690a_ddr4.config index 49b93cd14..0fbf49897 100644 --- a/boards/UNTESTED_msi_z690a_ddr4/UNTESTED_msi_z690a_ddr4.config +++ b/boards/UNTESTED_msi_z690a_ddr4/UNTESTED_msi_z690a_ddr4.config @@ -1,7 +1,7 @@ # MSI PRO Z690-A DDR4 board configuration export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=dasharo_msi +export CONFIG_COREBOOT_VERSION=dasharo_msi_z690 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-msi_z690a_ddr4.config diff --git a/boards/UNTESTED_msi_z690a_ddr5/UNTESTED_msi_z690a_ddr5.config b/boards/UNTESTED_msi_z690a_ddr5/UNTESTED_msi_z690a_ddr5.config index 2cfea823e..dbc8803c3 100644 --- a/boards/UNTESTED_msi_z690a_ddr5/UNTESTED_msi_z690a_ddr5.config +++ b/boards/UNTESTED_msi_z690a_ddr5/UNTESTED_msi_z690a_ddr5.config @@ -1,7 +1,7 @@ # MSI PRO Z690-A (DDR5) board configuration export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=dasharo_msi +export CONFIG_COREBOOT_VERSION=dasharo_msi_z690 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-msi_z690a_ddr5.config diff --git a/boards/UNTESTED_msi_z790p_ddr4/UNTESTED_msi_z790p_ddr4.config b/boards/UNTESTED_msi_z790p_ddr4/UNTESTED_msi_z790p_ddr4.config index 67c30d725..7b67bf351 100644 --- a/boards/UNTESTED_msi_z790p_ddr4/UNTESTED_msi_z790p_ddr4.config +++ b/boards/UNTESTED_msi_z790p_ddr4/UNTESTED_msi_z790p_ddr4.config @@ -1,7 +1,7 @@ # MSI PRO Z790-P DDR4 board configuration export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=dasharo_msi +export CONFIG_COREBOOT_VERSION=dasharo_msi_z790 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-msi_z790p_ddr4.config diff --git a/boards/UNTESTED_nitropad-ns50/UNTESTED_nitropad-ns50.config b/boards/UNTESTED_nitropad-ns50/UNTESTED_nitropad-ns50.config index 08459c80e..f77726d9e 100644 --- a/boards/UNTESTED_nitropad-ns50/UNTESTED_nitropad-ns50.config +++ b/boards/UNTESTED_nitropad-ns50/UNTESTED_nitropad-ns50.config @@ -5,7 +5,7 @@ # Dissassembly and Recovery: https://docs.dasharo.com/unified/novacustom/recovery/#ns5x7x-12th-gen export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=dasharo +export CONFIG_COREBOOT_VERSION=dasharo_nv4x export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-nitropad-ns50.config diff --git a/boards/msi_z790p_ddr5/msi_z790p_ddr5.config b/boards/msi_z790p_ddr5/msi_z790p_ddr5.config index 79f29adcf..91d71eed9 100644 --- a/boards/msi_z790p_ddr5/msi_z790p_ddr5.config +++ b/boards/msi_z790p_ddr5/msi_z790p_ddr5.config @@ -1,7 +1,7 @@ # MSI PRO Z790-P (DDR5) board configuration export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=dasharo_msi +export CONFIG_COREBOOT_VERSION=dasharo_msi_z790 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-msi_z790p_ddr5.config diff --git a/boards/novacustom-nv4x_adl/novacustom-nv4x_adl.config b/boards/novacustom-nv4x_adl/novacustom-nv4x_adl.config index 6056f9371..b73e00028 100644 --- a/boards/novacustom-nv4x_adl/novacustom-nv4x_adl.config +++ b/boards/novacustom-nv4x_adl/novacustom-nv4x_adl.config @@ -5,7 +5,7 @@ # Dissassembly and Recovery: https://docs.dasharo.com/unified/novacustom/recovery/#12th-gen export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=dasharo +export CONFIG_COREBOOT_VERSION=dasharo_nv4x export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-novacustom-nv4x_adl.config diff --git a/boards/novacustom-v540tu/novacustom-v540tu.config b/boards/novacustom-v540tu/novacustom-v540tu.config index 6b6d757a2..8d2aae0ee 100644 --- a/boards/novacustom-v540tu/novacustom-v540tu.config +++ b/boards/novacustom-v540tu/novacustom-v540tu.config @@ -14,7 +14,7 @@ # ME/CSME for s0ix to work (unsupported by QubesOS when writing those lines) or use Hibernate (Not supported by QubesOS either) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=dasharo +export CONFIG_COREBOOT_VERSION=dasharo_v56 export CONFIG_DASHARO_EC=y export CONFIG_LINUX_VERSION=6.1.8 diff --git a/boards/novacustom-v560tu/novacustom-v560tu.config b/boards/novacustom-v560tu/novacustom-v560tu.config index f9899c705..9c2c1432c 100644 --- a/boards/novacustom-v560tu/novacustom-v560tu.config +++ b/boards/novacustom-v560tu/novacustom-v560tu.config @@ -14,7 +14,7 @@ # ME/CSME for s0ix to work (unsupported by QubesOS when writing those lines) or use Hibernate (Not supported by QubesOS either) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=dasharo +export CONFIG_COREBOOT_VERSION=dasharo_v56 export CONFIG_DASHARO_EC=y export CONFIG_LINUX_VERSION=6.1.8 diff --git a/modules/coreboot b/modules/coreboot index 38af64eb8..56dcd923c 100644 --- a/modules/coreboot +++ b/modules/coreboot @@ -77,6 +77,14 @@ coreboot-24.02.01_hash := e56f5c0c9008bfdec1c4be6409ac093680140f9441efd3d5e47bde coreboot-blobs-24.02.01_hash := 8d03b82cd2b2593473d4cd511c7bef7fdd43839237f6c37a8383161660c14427 $(eval $(call coreboot_module,24.02.01,)) +coreboot-24.12_hash := dd211bdd914509aea7526348db13cf8b809acd0e2214da6c6b008975f04587ed +coreboot-blobs-24.12_hash := e75a788fa4910d48c42e9997ff55f27aaa06dc2999bab9b60483172ea587e7c0 +$(eval $(call coreboot_module,24.12,)) + +coreboot-25.03_hash := 9182f84c0bf869cb97601594edd50f5891e97b9dc34c0e158bce2cf9ed51175a +coreboot-blobs-25.03_hash := 03e8f565f73b932f942f08f0058d37080e1d2b0ce866596c25e607d14d1e95f0 +$(eval $(call coreboot_module,25.03,)) + # coreboot git forks # talos_2 could use the 4.20.1 toolchain, but it's the only ppc64 fork, so @@ -91,18 +99,36 @@ coreboot-purism_repo := https://source.puri.sm/firmware/coreboot.git coreboot-purism_commit_hash := bea9947a1279be7d4a72b38a601d0288d10d1cb8 $(eval $(call coreboot_module,purism,24.02.01)) -# NovaCustom NV4xPZ, NS5xPU, V560TU boards are based on Dasharo -# coreboot fork, based on upstream coreboot version 24.02 -coreboot-dasharo_repo := https://github.com/dasharo/coreboot -coreboot-dasharo_commit_hash := 6de027d1f0a62753182237ce3d793e5ba0395139 -$(eval $(call coreboot_module,dasharo,24.02.01)) -#coreboot-dasharo_patch_version := unreleased - -# MSI boards are based on Dasharo, this commit hash should be pinned to -# the most recent MSI release. -coreboot-dasharo_msi_repo := https://github.com/dasharo/coreboot -coreboot-dasharo_msi_commit_hash := a5a05f133471c0463609631b599cdd88a623561f # This is `msi_ms7e06_v0.9.4` tag, effectively same as `msi_ms7d25_v1.1.6`. -$(eval $(call coreboot_module,dasharo_msi,24.02.01)) +# Dasharo forks - based on various coreboot upstream releases +# IMPORTANT: Dasharo forks CANNOT share toolchains with upstream coreboot releases +# or with each other. Dasharo uses custom FSP packages (3rdparty/dasharo-blobs/) +# with different/missing headers vs upstream (e.g. MemInfoHob.h, FirmwareVersionInfoHob.h). +# Each Dasharo fork therefore builds its own crossgcc toolchain (empty second arg). + +# NovaCustom V560TU/V540TU (Meteor Lake) +# Tag: novacustom_v56x_mtl_igpu_v1.0.1 (SHA: 6de027d1) +coreboot-dasharo_v56_repo := https://github.com/dasharo/coreboot +coreboot-dasharo_v56_commit_hash := 6de027d1f0a62753182237ce3d793e5ba0395139 +$(eval $(call coreboot_module,dasharo_v56,)) +coreboot-dasharo_v56_patch_version := unreleased + +# NovaCustom NV4x ADL / NitroPad NS50 +# Tag: novacustom_nv4x_adl_v1.8.0 (SHA: 281a7fec) +coreboot-dasharo_nv4x_repo := https://github.com/dasharo/coreboot +coreboot-dasharo_nv4x_commit_hash := 281a7fec1a1e7aed781b12a096c2fc0f87dc51b5 +$(eval $(call coreboot_module,dasharo_nv4x,)) + +# MSI Z790 boards +# Tag: msi_ms7e06_v0.9.4 (SHA: a5a05f13) +coreboot-dasharo_msi_z790_repo := https://github.com/dasharo/coreboot +coreboot-dasharo_msi_z790_commit_hash := a5a05f133471c0463609631b599cdd88a623561f +$(eval $(call coreboot_module,dasharo_msi_z790,)) + +# MSI Z690 boards +# Tag: msi_ms7d25_v1.1.6 (SHA: be7d58da) +coreboot-dasharo_msi_z690_repo := https://github.com/dasharo/coreboot +coreboot-dasharo_msi_z690_commit_hash := be7d58dac9365d8981dbb1f5c6bbbcce35df8636 +$(eval $(call coreboot_module,dasharo_msi_z690,)) # T480 is based on coreboot ~25.09 release # coreboot 25.09 doesn't include Thunderbolt support and support of the lower USB-C port which is still under review at https://review.coreboot.org/c/coreboot/+/75286 and https://review.coreboot.org/c/coreboot/+/88490 @@ -128,6 +154,7 @@ coreboot_dir := $($(coreboot_module)_dir) coreboot_base_dir := $($(coreboot_module)_base_dir) $(coreboot_module)_depends += $(if $(CONFIG_PURISM_BLOBS), purism-blobs) +$(coreboot_module)_depends += $(if $(CONFIG_DASHARO_EC), dasharo-ec) # coreboot builds are specialized on a per-target basis. # The builds are done in a per-target subdirectory @@ -172,6 +199,7 @@ $(coreboot_module)_configure := \ sed -i '/^CONFIG_MAINBOARD_SMBIOS_MANUFACTURER/d' $(build)/$(coreboot_dir)/.config; \ echo 'CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="$(CONFIG_COREBOOT_SMBIOS_MANUFACTURER)"' >> $(build)/$(coreboot_dir)/.config; \ fi; \ + sed -i 's|@COREBOOT_BUILD_DIR@|$(build)/$(coreboot_dir)|g' "$(build)/$(coreboot_dir)/.config"; \ $(MAKE) olddefconfig \ -C "$(build)/$(coreboot_base_dir)" \ obj="$(build)/$(coreboot_dir)" \ @@ -290,7 +318,7 @@ coreboot.save_in_defconfig_format_in_place: olddefconfig && \ $(MAKE) \ -C "$(build)/$(coreboot_base_dir)" \ - DOTCONFIG="$(build)/$(coreboot_dir)/.config" \ + DOTCONFIG="$(build)/$(coreboot_dir)/.config" \ savedefconfig && \ mv "$(build)/$(coreboot_base_dir)/defconfig" "$(pwd)/$(CONFIG_COREBOOT_CONFIG)" From 06a38e35d136570f58e55c51fe06a2ffe7cb88be Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Fri, 10 Apr 2026 11:43:31 +0200 Subject: [PATCH 09/25] MTL: switch from Notebook to Clevo MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Filip Lewiński --- config/coreboot-novacustom-v540tu.config | 2 +- config/coreboot-novacustom-v560tu.config | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/config/coreboot-novacustom-v540tu.config b/config/coreboot-novacustom-v540tu.config index 51754757c..fd08e0b1d 100644 --- a/config/coreboot-novacustom-v540tu.config +++ b/config/coreboot-novacustom-v540tu.config @@ -126,7 +126,7 @@ CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=1024 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="Notebook" +CONFIG_MAINBOARD_VENDOR="Clevo" CONFIG_CBFS_SIZE=0x1000000 # CONFIG_CONSOLE_SERIAL is not set CONFIG_MAX_CPUS=22 diff --git a/config/coreboot-novacustom-v560tu.config b/config/coreboot-novacustom-v560tu.config index 3a46936fe..16db2817d 100644 --- a/config/coreboot-novacustom-v560tu.config +++ b/config/coreboot-novacustom-v560tu.config @@ -126,7 +126,7 @@ CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=1024 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="Notebook" +CONFIG_MAINBOARD_VENDOR="Clevo" CONFIG_CBFS_SIZE=0x1000000 # CONFIG_CONSOLE_SERIAL is not set CONFIG_MAX_CPUS=22 From 7f2f495fbc954a79477c600663425dac0b0f2f49 Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Tue, 17 Feb 2026 09:04:19 -0500 Subject: [PATCH 10/25] coreboot-dasahro: add https://github.com/Dasharo/coreboot/pull/847 on top of 1.0.1 for testing (Improve performance by lowering the EPP value from the power-on default of 0xb3 (70%) to 0x73 (45%). Lower value = higher performance.) Test fix for https://github.com/Dasharo/dasharo-issues/issues/1711 related: - https://github.com/linuxboot/heads/pull/2039 - https://github.com/Dasharo/dasharo-issues/issues/1711 - https://github.com/linuxboot/heads/issues/1894 Signed-off-by: Thierry Laurion --- patches/coreboot-dasharo-unreleased/847.patch | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 patches/coreboot-dasharo-unreleased/847.patch diff --git a/patches/coreboot-dasharo-unreleased/847.patch b/patches/coreboot-dasharo-unreleased/847.patch new file mode 100644 index 000000000..592e1dc7e --- /dev/null +++ b/patches/coreboot-dasharo-unreleased/847.patch @@ -0,0 +1,50 @@ +From 3730ed80345632754fbdecf0bfddb89e4fd45847 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= +Date: Thu, 12 Feb 2026 16:49:40 +0100 +Subject: [PATCH] mb/novacustom/mtl-h: Bump Energy Performance Preference to + 45% +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Improve performance by lowering the EPP value from the power-on default +of 0xb3 (70%) to 0x73 (45%). Lower value = higher performance. + +Upstream-Status: Pending +Change-Id: I5a1f48dd2b563cf7dc37f7682317e5b7f81ad13c +Signed-off-by: Michał Kopeć +--- + src/mainboard/novacustom/mtl-h/variants/dgpu/overridetree.cb | 4 ++++ + src/mainboard/novacustom/mtl-h/variants/igpu/overridetree.cb | 4 ++++ + 2 files changed, 8 insertions(+) + +diff --git a/src/mainboard/novacustom/mtl-h/variants/dgpu/overridetree.cb b/src/mainboard/novacustom/mtl-h/variants/dgpu/overridetree.cb +index 73edf9c3ea8..d5d61b196a1 100644 +--- a/src/mainboard/novacustom/mtl-h/variants/dgpu/overridetree.cb ++++ b/src/mainboard/novacustom/mtl-h/variants/dgpu/overridetree.cb +@@ -11,6 +11,10 @@ chip soc/intel/meteorlake + # MTL SOC has additional setting for PsysPmax + register "psys_pmax_watts" = "180" + ++ # set EPP to 45%: 45 * 256/100 = 115 = 0x73 ++ register "enable_energy_perf_pref" = "true" ++ register "energy_perf_pref_value" = "0x73" ++ + device domain 0 on + subsystemid 0x1558 0xa741 inherit + device ref pcie_rp12 on # PEG +diff --git a/src/mainboard/novacustom/mtl-h/variants/igpu/overridetree.cb b/src/mainboard/novacustom/mtl-h/variants/igpu/overridetree.cb +index 3745a68df56..b7a71b2e1df 100644 +--- a/src/mainboard/novacustom/mtl-h/variants/igpu/overridetree.cb ++++ b/src/mainboard/novacustom/mtl-h/variants/igpu/overridetree.cb +@@ -11,6 +11,10 @@ chip soc/intel/meteorlake + # MTL SOC has additional setting for PsysPmax + register "psys_pmax_watts" = "99" + ++ # set EPP to 45%: 45 * 256/100 = 115 = 0x73 ++ register "enable_energy_perf_pref" = "true" ++ register "energy_perf_pref_value" = "0x73" ++ + device domain 0 on + subsystemid 0x1558 0xa743 inherit + device ref igpu on From 70b1f6380ddab61c4bf38b5c534130d600b43d86 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Fri, 10 Apr 2026 09:53:44 +0000 Subject: [PATCH 11/25] patches: rename coreboot-dasharo-unreleased -> coreboot-dasharo_v56-unreleased MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The coreboot module for NovaCustom MTL boards was renamed from 'dasharo' to 'dasharo_v56'. The Heads patch system resolves patch directories as [-], so with module coreboot-dasharo_v56 and patch_version=unreleased the expected path is patches/coreboot-dasharo_v56-unreleased/. Signed-off-by: Filip Lewiński --- .../847.patch | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename patches/{coreboot-dasharo-unreleased => coreboot-dasharo_v56-unreleased}/847.patch (100%) diff --git a/patches/coreboot-dasharo-unreleased/847.patch b/patches/coreboot-dasharo_v56-unreleased/847.patch similarity index 100% rename from patches/coreboot-dasharo-unreleased/847.patch rename to patches/coreboot-dasharo_v56-unreleased/847.patch From c8eb0e74217f44bf35d0270f07cc3f4e9ddece0f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Fri, 10 Apr 2026 12:39:37 +0200 Subject: [PATCH 12/25] .circleci/: account for the dasharo refactor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Filip Lewiński --- .circleci/config.yml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/.circleci/config.yml b/.circleci/config.yml index b64561d01..0bddca461 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -201,7 +201,10 @@ jobs: - build/x86/coreboot-4.11 - build/x86/coreboot-24.02.01 - build/x86/coreboot-25.09 - - build/x86/coreboot-dasharo + - build/x86/coreboot-dasharo_v56 + - build/x86/coreboot-dasharo_nv4x + - build/x86/coreboot-dasharo_msi_z790 + - build/x86/coreboot-dasharo_msi_z690 - build/x86/coreboot-purism - build/x86/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c - crossgcc From 5673c1ec32fa923739bb4982ec32e3fcbd2a2886 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Fri, 10 Apr 2026 16:41:25 +0200 Subject: [PATCH 13/25] ADL: add updated nv4x_adl config MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Filip Lewiński --- .../novacustom-nv4x_adl.config | 1 + config/coreboot-novacustom-nv4x_adl.config | 135 +++++++++++------- 2 files changed, 85 insertions(+), 51 deletions(-) diff --git a/boards/novacustom-nv4x_adl/novacustom-nv4x_adl.config b/boards/novacustom-nv4x_adl/novacustom-nv4x_adl.config index b73e00028..eb7838052 100644 --- a/boards/novacustom-nv4x_adl/novacustom-nv4x_adl.config +++ b/boards/novacustom-nv4x_adl/novacustom-nv4x_adl.config @@ -6,6 +6,7 @@ export CONFIG_COREBOOT=y export CONFIG_COREBOOT_VERSION=dasharo_nv4x +export CONFIG_DASHARO_EC=y export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-novacustom-nv4x_adl.config diff --git a/config/coreboot-novacustom-nv4x_adl.config b/config/coreboot-novacustom-nv4x_adl.config index d36edb6b0..c05293387 100644 --- a/config/coreboot-novacustom-nv4x_adl.config +++ b/config/coreboot-novacustom-nv4x_adl.config @@ -6,20 +6,18 @@ # # General setup # -CONFIG_COREBOOT_BUILD=y -CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION="v1.8.0" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -# CONFIG_OPTION_BACKEND_NONE is not set -CONFIG_USE_OPTION_TABLE=y -# CONFIG_STATIC_OPTION_TABLE is not set +CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_OPTION_TABLE is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -42,7 +40,6 @@ CONFIG_BOOTSPLASH_CONVERT=y CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_BOOTSPLASH_CONVERT_RESIZE is not set # CONFIG_BOOTSPLASH_CONVERT_COLORSWAP is not set -# CONFIG_FW_CONFIG is not set # # Software Bill Of Materials (SBOM) @@ -60,10 +57,11 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # # CONFIG_VENDOR_51NB is not set # CONFIG_VENDOR_ACER is not set -# CONFIG_VENDOR_ADLINK is not set # CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -72,11 +70,14 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_VENDOR_CAVIUM is not set # CONFIG_VENDOR_CLEVO is not set # CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set @@ -87,8 +88,10 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set CONFIG_VENDOR_NOVACUSTOM=y # CONFIG_VENDOR_OCP is not set @@ -100,6 +103,7 @@ CONFIG_VENDOR_NOVACUSTOM=y # CONFIG_VENDOR_PRODRIVE is not set # CONFIG_VENDOR_PROTECTLI is not set # CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set # CONFIG_VENDOR_RAZER is not set # CONFIG_VENDOR_RODA is not set # CONFIG_VENDOR_SAMSUNG is not set @@ -110,7 +114,9 @@ CONFIG_VENDOR_NOVACUSTOM=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="Not Applicable" CONFIG_MAINBOARD_PART_NUMBER="nv40pz" CONFIG_MAINBOARD_VERSION="v2.1" @@ -119,7 +125,7 @@ CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=512 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="Notebook" +CONFIG_MAINBOARD_VENDOR="Clevo" CONFIG_CBFS_SIZE=0x1000000 # CONFIG_CONSOLE_SERIAL is not set CONFIG_MAX_CPUS=24 @@ -127,38 +133,46 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y # CONFIG_POST_DEVICE is not set # CONFIG_POST_IO is not set CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="nv40pz" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_VBOOT_VBNV_OFFSET=0x28 -CONFIG_VARIANT_DIR="nv40pz" -CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" # CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Notebook" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x4000 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="NV4xPZ" +CONFIG_CONSOLE_POST=y +CONFIG_FSP_FD_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/FSP.fd" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_BOARD_CLEVO_ADLP_COMMON=y CONFIG_BOARD_CLEVO_NV40PZ_BASE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="NV4xPZ" -CONFIG_CONSOLE_POST=y # CONFIG_USE_PM_ACPI_TIMER is not set CONFIG_TPM_PIRQ=0x27 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)" -CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y -CONFIG_EC_SYSTEM76_EC_FLASH_SIZE=0x20000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_DEBUG_SMI is not set +CONFIG_EC_DASHARO_EC_BAT_THRESHOLDS=y +CONFIG_PXE_ROM_ID="10ec,8168" CONFIG_DCACHE_RAM_BASE=0xfef00000 CONFIG_DCACHE_RAM_SIZE=0xc0000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x80400 +CONFIG_DCACHE_BSP_STACK_SIZE=0x88000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y +# CONFIG_USE_LEGACY_8254_TIMER is not set CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/nv4x_adl/descriptor.bin" @@ -166,8 +180,6 @@ CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/nv4x_adl/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y -# CONFIG_USE_LEGACY_8254_TIMER is not set -# CONFIG_DEBUG_SMI is not set CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=42 CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000 @@ -181,22 +193,34 @@ CONFIG_PS2M_EISAID="PNP0F13" # CONFIG_BOARD_NOVACUSTOM_NS5X_ADLP is not set CONFIG_BOARD_NOVACUSTOM_NV4X_ADLP=y +# +# Meteor Lake H +# +# CONFIG_BOARD_NOVACUSTOM_V540TNX is not set +# CONFIG_BOARD_NOVACUSTOM_V560TNX is not set +# CONFIG_BOARD_NOVACUSTOM_V540TU is not set +# CONFIG_BOARD_NOVACUSTOM_V560TU is not set +# CONFIG_BOARD_NOVACUSTOM_NUC_BOX is not set + # # Tiger Lake U (2021) # # CONFIG_BOARD_NOVACUSTOM_NV4X_TGLU is not set # CONFIG_BOARD_NOVACUSTOM_NS5X_TGLU is not set -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000 +CONFIG_EC_DASHARO_EC_CPU_FAN_COUNT=1 CONFIG_D3COLD_SUPPORT=y -CONFIG_PCIEXP_ASPM=y -CONFIG_PCIEXP_L1_SUB_STATE=y -CONFIG_PCIEXP_CLK_PM=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 CONFIG_FSP_TEMP_RAM_SIZE=0x20000 +CONFIG_HEAP_SIZE=0x100000 CONFIG_EC_GPE_SCI=0x50 -CONFIG_TPM_MEASURED_BOOT=y -CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" CONFIG_BOARD_ROMSIZE_KB_32768=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set @@ -276,16 +300,15 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=8 CONFIG_SOC_INTEL_UART_DEV_MAX=7 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" -CONFIG_FSP_FD_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" -CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT=0 +CONFIG_FSP_TYPE_IOT=y +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/Include/" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 CONFIG_DATA_BUS_WIDTH=128 CONFIG_DIMMS_PER_CHANNEL=2 CONFIG_MRC_CHANNEL_WIDTH=16 CONFIG_ALDERLAKE_ENABLE_SOC_WORKAROUND=y CONFIG_SI_DESC_REGION="SI_DESC" CONFIG_SI_DESC_REGION_SZ=4096 -# CONFIG_BUILDING_WITH_DEBUG_FSP is not set CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258 CONFIG_INTEL_GMA_BCLV_WIDTH=32 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254 @@ -293,6 +316,8 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=32 CONFIG_FSP_PUBLISH_MBP_HOB=y # CONFIG_INCLUDE_HSPHY_IN_FMAP is not set CONFIG_HSPHY_FW_MAX_SIZE=0x8000 +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_MAX_HECI_DEVICES=6 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_HAVE_PAM0_REGISTER=y @@ -303,6 +328,8 @@ CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y +CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_INTEL_TME=y CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -332,6 +359,7 @@ CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y CONFIG_INTEL_CAR_NEM_ENHANCED=y +CONFIG_INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE=y CONFIG_CAR_HAS_SF_MASKS=y CONFIG_COS_MAPPED_TO_MSB=y CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y @@ -405,10 +433,12 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y -# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y # CONFIG_TCSS_HAS_USBC_OPS is not set CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y @@ -423,7 +453,7 @@ CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y CONFIG_FIRMWARE_CONNECTION_MANAGER=y # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y -# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y @@ -469,7 +499,6 @@ CONFIG_XAPIC_ONLY=y # CONFIG_X2APIC_LATE_WORKAROUND is not set CONFIG_UDELAY_TSC=y CONFIG_TSC_MONOTONIC_TIMER=y -CONFIG_X86_CLFLUSH_CAR=y CONFIG_HAVE_SMI_HANDLER=y CONFIG_SMM_TSEG=y CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 @@ -497,7 +526,7 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y -# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y # CONFIG_INTEL_CHIPSET_LOCKDOWN is not set CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -510,9 +539,10 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y -CONFIG_EC_SYSTEM76_EC=y -CONFIG_EC_SYSTEM76_EC_DGPU=y -# CONFIG_EC_SYSTEM76_EC_UPDATE is not set +CONFIG_EC_DASHARO_EC=y +CONFIG_EC_DASHARO_EC_DGPU=y +CONFIG_EC_DASHARO_EC_UPDATE=y +CONFIG_EC_DASHARO_EC_UPDATE_FILE="ec.rom" # # Intel Firmware @@ -542,12 +572,15 @@ CONFIG_DASHARO_PREFER_S3_SLEEP=y # CONFIG_DASHARO_FIRMWARE_UPDATE_MODE is not set # end of Dasharo Configuration +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_UDK_BASE=y CONFIG_UDK_202005_BINDING=y CONFIG_UDK_2013_VERSION=2013 CONFIG_UDK_2017_VERSION=2017 CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 CONFIG_UDK_VERSION=202005 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y @@ -573,6 +606,10 @@ CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -591,13 +628,13 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y CONFIG_BOOTSPLASH=y +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_AZALIA_HDA_CODEC_SUPPORT=y -CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y CONFIG_ECAM_MMCONF_LENGTH=0x10000000 CONFIG_PCI_ALLOW_BUS_MASTER=y @@ -622,9 +659,11 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -632,7 +671,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y -# CONFIG_TPM_PPI is not set CONFIG_DRIVERS_UART=y CONFIG_NO_UART_ON_SUPERIO=y CONFIG_DRIVERS_UART_8250MEM=y @@ -658,7 +696,6 @@ CONFIG_PLATFORM_USES_FSP2_3=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_FSP_S_CBFS="fsps.bin" CONFIG_FSP_M_CBFS="fspm.bin" CONFIG_FSP_FULL_FD=y @@ -666,8 +703,6 @@ CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y CONFIG_FSP_USES_CB_STACK=y CONFIG_FSP_COMPRESS_FSP_S_LZ4=y -CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y -CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_FSPS_HAS_ARCH_UPD=y CONFIG_FSPS_USE_MULTI_PHASE_INIT=y @@ -675,6 +710,7 @@ CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set CONFIG_FSP_ENABLE_SERIAL_DEBUG=y CONFIG_FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN=y +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set @@ -684,9 +720,9 @@ CONFIG_INTEL_GMA_OPREGION_2_1=y CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_BMP_LOGO is not set # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y -# CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_MEMORY_MAPPED_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 @@ -697,6 +733,7 @@ CONFIG_DRIVERS_MTK_WIFI=y CONFIG_MP_SERVICES_PPI=y CONFIG_MP_SERVICES_PPI_V2=y CONFIG_DRIVERS_INTEL_USB4_RETIMER=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y # end of Generic Drivers # @@ -723,7 +760,6 @@ CONFIG_TPM2=y CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM2=y # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM2=y # CONFIG_TPM_HASH_SHA1 is not set @@ -769,7 +805,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y CONFIG_RTC=y -CONFIG_HEAP_SIZE=0x100000 # # Console @@ -784,7 +819,6 @@ CONFIG_CONSOLE_CBMEM=y # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set -# CONFIG_CONSOLE_SYSTEM76_EC is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set @@ -795,8 +829,8 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 -CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y -CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set +# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set # CONFIG_CMOS_POST is not set CONFIG_HWBASE_DEBUG_CB=y # end of Console @@ -820,6 +854,7 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" # # CONFIG_PAYLOAD_NONE is not set # CONFIG_PAYLOAD_ELF is not set +# CONFIG_PAYLOAD_FLAT_BINARY is not set # CONFIG_PAYLOAD_BOOTBOOT is not set # CONFIG_PAYLOAD_FILO is not set # CONFIG_PAYLOAD_GRUB2 is not set @@ -839,7 +874,6 @@ CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" # # end of Dasharo specific payload options -# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -883,7 +917,6 @@ CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set CONFIG_HAVE_DEBUG_GPIO=y # CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_CBFS is not set From cbacb39d0fe6cf57a4651858726ec13639258e83 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Mon, 13 Apr 2026 10:42:31 +0200 Subject: [PATCH 14/25] MTL: disable CMOS_ALTCENTURY MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Filip Lewiński --- config/coreboot-novacustom-v540tu.config | 2 +- config/coreboot-novacustom-v560tu.config | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/config/coreboot-novacustom-v540tu.config b/config/coreboot-novacustom-v540tu.config index fd08e0b1d..56a44f5c5 100644 --- a/config/coreboot-novacustom-v540tu.config +++ b/config/coreboot-novacustom-v540tu.config @@ -739,7 +739,7 @@ CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set CONFIG_DRIVERS_MC146818=y -CONFIG_USE_PC_CMOS_ALTCENTURY=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_MEMORY_MAPPED_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 diff --git a/config/coreboot-novacustom-v560tu.config b/config/coreboot-novacustom-v560tu.config index 16db2817d..ff72f8604 100644 --- a/config/coreboot-novacustom-v560tu.config +++ b/config/coreboot-novacustom-v560tu.config @@ -739,7 +739,7 @@ CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set CONFIG_DRIVERS_MC146818=y -CONFIG_USE_PC_CMOS_ALTCENTURY=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_MEMORY_MAPPED_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 From cc43659904f5803469c7c58c7ea279bec60dbebf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Tue, 14 Apr 2026 08:36:54 +0200 Subject: [PATCH 15/25] ADL: add ns50 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Filip Lewiński --- .../UNTESTED_nitropad-ns50.config | 1 + config/coreboot-nitropad-ns50.config | 135 +++++++++++------- 2 files changed, 86 insertions(+), 50 deletions(-) diff --git a/boards/UNTESTED_nitropad-ns50/UNTESTED_nitropad-ns50.config b/boards/UNTESTED_nitropad-ns50/UNTESTED_nitropad-ns50.config index f77726d9e..3b139b803 100644 --- a/boards/UNTESTED_nitropad-ns50/UNTESTED_nitropad-ns50.config +++ b/boards/UNTESTED_nitropad-ns50/UNTESTED_nitropad-ns50.config @@ -6,6 +6,7 @@ export CONFIG_COREBOOT=y export CONFIG_COREBOOT_VERSION=dasharo_nv4x +CONFIG_DASHARO_EC=y export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-nitropad-ns50.config diff --git a/config/coreboot-nitropad-ns50.config b/config/coreboot-nitropad-ns50.config index d777c25bd..f5196cfcc 100644 --- a/config/coreboot-nitropad-ns50.config +++ b/config/coreboot-nitropad-ns50.config @@ -6,20 +6,18 @@ # # General setup # -CONFIG_COREBOOT_BUILD=y -CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION="v1.8.0" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -# CONFIG_OPTION_BACKEND_NONE is not set -CONFIG_USE_OPTION_TABLE=y -# CONFIG_STATIC_OPTION_TABLE is not set +CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_OPTION_TABLE is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -42,7 +40,6 @@ CONFIG_BOOTSPLASH_CONVERT=y CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_BOOTSPLASH_CONVERT_RESIZE is not set # CONFIG_BOOTSPLASH_CONVERT_COLORSWAP is not set -# CONFIG_FW_CONFIG is not set # # Software Bill Of Materials (SBOM) @@ -60,10 +57,11 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # # CONFIG_VENDOR_51NB is not set # CONFIG_VENDOR_ACER is not set -# CONFIG_VENDOR_ADLINK is not set # CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -72,11 +70,14 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_VENDOR_CAVIUM is not set # CONFIG_VENDOR_CLEVO is not set # CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set @@ -87,8 +88,10 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set CONFIG_VENDOR_NOVACUSTOM=y # CONFIG_VENDOR_OCP is not set @@ -100,6 +103,7 @@ CONFIG_VENDOR_NOVACUSTOM=y # CONFIG_VENDOR_PRODRIVE is not set # CONFIG_VENDOR_PROTECTLI is not set # CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set # CONFIG_VENDOR_RAZER is not set # CONFIG_VENDOR_RODA is not set # CONFIG_VENDOR_SAMSUNG is not set @@ -110,7 +114,9 @@ CONFIG_VENDOR_NOVACUSTOM=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="Not Applicable" CONFIG_MAINBOARD_PART_NUMBER="ns50pu" CONFIG_MAINBOARD_VERSION="v2.1" @@ -119,7 +125,7 @@ CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=512 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="Notebook" +CONFIG_MAINBOARD_VENDOR="Clevo" CONFIG_CBFS_SIZE=0x1000000 # CONFIG_CONSOLE_SERIAL is not set CONFIG_MAX_CPUS=24 @@ -127,38 +133,46 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y # CONFIG_POST_DEVICE is not set # CONFIG_POST_IO is not set CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="ns50pu" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_VBOOT_VBNV_OFFSET=0x28 -CONFIG_VARIANT_DIR="ns50pu" -CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" # CONFIG_VGA_BIOS is not set -CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Nitrokey" +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Notebook" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x4000 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="NS5x_NS7xPU" +CONFIG_CONSOLE_POST=y +CONFIG_FSP_FD_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/FSP.fd" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_BOARD_CLEVO_ADLP_COMMON=y CONFIG_BOARD_CLEVO_NS50PU_BASE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Nitropad NS51" -CONFIG_CONSOLE_POST=y # CONFIG_USE_PM_ACPI_TIMER is not set CONFIG_TPM_PIRQ=0x27 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)" -CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y -CONFIG_EC_SYSTEM76_EC_FLASH_SIZE=0x20000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_DEBUG_SMI is not set +CONFIG_EC_DASHARO_EC_BAT_THRESHOLDS=y +CONFIG_PXE_ROM_ID="10ec,8168" CONFIG_DCACHE_RAM_BASE=0xfef00000 CONFIG_DCACHE_RAM_SIZE=0xc0000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x80400 +CONFIG_DCACHE_BSP_STACK_SIZE=0x88000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y +# CONFIG_USE_LEGACY_8254_TIMER is not set CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/ns5x_adl/descriptor.bin" @@ -166,8 +180,6 @@ CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/ns5x_adl/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y -# CONFIG_USE_LEGACY_8254_TIMER is not set -# CONFIG_DEBUG_SMI is not set CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=42 CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000 @@ -181,22 +193,34 @@ CONFIG_PS2M_EISAID="PNP0F13" CONFIG_BOARD_NOVACUSTOM_NS5X_ADLP=y # CONFIG_BOARD_NOVACUSTOM_NV4X_ADLP is not set +# +# Meteor Lake H +# +# CONFIG_BOARD_NOVACUSTOM_V540TNX is not set +# CONFIG_BOARD_NOVACUSTOM_V560TNX is not set +# CONFIG_BOARD_NOVACUSTOM_V540TU is not set +# CONFIG_BOARD_NOVACUSTOM_V560TU is not set +# CONFIG_BOARD_NOVACUSTOM_NUC_BOX is not set + # # Tiger Lake U (2021) # # CONFIG_BOARD_NOVACUSTOM_NV4X_TGLU is not set # CONFIG_BOARD_NOVACUSTOM_NS5X_TGLU is not set -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000 +CONFIG_EC_DASHARO_EC_CPU_FAN_COUNT=1 CONFIG_D3COLD_SUPPORT=y -CONFIG_PCIEXP_ASPM=y -CONFIG_PCIEXP_L1_SUB_STATE=y -CONFIG_PCIEXP_CLK_PM=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 CONFIG_FSP_TEMP_RAM_SIZE=0x20000 +CONFIG_HEAP_SIZE=0x100000 CONFIG_EC_GPE_SCI=0x50 -CONFIG_TPM_MEASURED_BOOT=y -CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" CONFIG_BOARD_ROMSIZE_KB_32768=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set @@ -276,16 +300,15 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=8 CONFIG_SOC_INTEL_UART_DEV_MAX=7 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" -CONFIG_FSP_FD_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" -CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT=0 +CONFIG_FSP_TYPE_IOT=y +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/Include/" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 CONFIG_DATA_BUS_WIDTH=128 CONFIG_DIMMS_PER_CHANNEL=2 CONFIG_MRC_CHANNEL_WIDTH=16 CONFIG_ALDERLAKE_ENABLE_SOC_WORKAROUND=y CONFIG_SI_DESC_REGION="SI_DESC" CONFIG_SI_DESC_REGION_SZ=4096 -# CONFIG_BUILDING_WITH_DEBUG_FSP is not set CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258 CONFIG_INTEL_GMA_BCLV_WIDTH=32 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254 @@ -293,6 +316,8 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=32 CONFIG_FSP_PUBLISH_MBP_HOB=y # CONFIG_INCLUDE_HSPHY_IN_FMAP is not set CONFIG_HSPHY_FW_MAX_SIZE=0x8000 +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_MAX_HECI_DEVICES=6 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_HAVE_PAM0_REGISTER=y @@ -303,6 +328,8 @@ CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y +CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_INTEL_TME=y CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -332,6 +359,7 @@ CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y CONFIG_INTEL_CAR_NEM_ENHANCED=y +CONFIG_INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE=y CONFIG_CAR_HAS_SF_MASKS=y CONFIG_COS_MAPPED_TO_MSB=y CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y @@ -405,10 +433,12 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y -# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y # CONFIG_TCSS_HAS_USBC_OPS is not set CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y @@ -423,7 +453,7 @@ CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y CONFIG_FIRMWARE_CONNECTION_MANAGER=y # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y -# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y @@ -469,7 +499,6 @@ CONFIG_XAPIC_ONLY=y # CONFIG_X2APIC_LATE_WORKAROUND is not set CONFIG_UDELAY_TSC=y CONFIG_TSC_MONOTONIC_TIMER=y -CONFIG_X86_CLFLUSH_CAR=y CONFIG_HAVE_SMI_HANDLER=y CONFIG_SMM_TSEG=y CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 @@ -497,7 +526,7 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y -# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y # CONFIG_INTEL_CHIPSET_LOCKDOWN is not set CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -510,8 +539,9 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y -CONFIG_EC_SYSTEM76_EC=y -# CONFIG_EC_SYSTEM76_EC_UPDATE is not set +CONFIG_EC_DASHARO_EC=y +CONFIG_EC_DASHARO_EC_UPDATE=y +CONFIG_EC_DASHARO_EC_UPDATE_FILE="ec.rom" # # Intel Firmware @@ -541,12 +571,15 @@ CONFIG_DASHARO_PREFER_S3_SLEEP=y # CONFIG_DASHARO_FIRMWARE_UPDATE_MODE is not set # end of Dasharo Configuration +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_UDK_BASE=y CONFIG_UDK_202005_BINDING=y CONFIG_UDK_2013_VERSION=2013 CONFIG_UDK_2017_VERSION=2017 CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 CONFIG_UDK_VERSION=202005 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y @@ -572,6 +605,10 @@ CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -590,13 +627,13 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y CONFIG_BOOTSPLASH=y +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_AZALIA_HDA_CODEC_SUPPORT=y -CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y CONFIG_ECAM_MMCONF_LENGTH=0x10000000 CONFIG_PCI_ALLOW_BUS_MASTER=y @@ -621,9 +658,11 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -631,7 +670,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y -# CONFIG_TPM_PPI is not set CONFIG_DRIVERS_UART=y CONFIG_NO_UART_ON_SUPERIO=y CONFIG_DRIVERS_UART_8250MEM=y @@ -657,7 +695,6 @@ CONFIG_PLATFORM_USES_FSP2_3=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_FSP_S_CBFS="fsps.bin" CONFIG_FSP_M_CBFS="fspm.bin" CONFIG_FSP_FULL_FD=y @@ -665,8 +702,6 @@ CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y CONFIG_FSP_USES_CB_STACK=y CONFIG_FSP_COMPRESS_FSP_S_LZ4=y -CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y -CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_FSPS_HAS_ARCH_UPD=y CONFIG_FSPS_USE_MULTI_PHASE_INIT=y @@ -674,6 +709,7 @@ CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set CONFIG_FSP_ENABLE_SERIAL_DEBUG=y CONFIG_FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN=y +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set @@ -683,6 +719,7 @@ CONFIG_INTEL_GMA_OPREGION_2_1=y CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_BMP_LOGO is not set # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y # CONFIG_USE_PC_CMOS_ALTCENTURY is not set @@ -696,6 +733,7 @@ CONFIG_DRIVERS_MTK_WIFI=y CONFIG_MP_SERVICES_PPI=y CONFIG_MP_SERVICES_PPI_V2=y CONFIG_DRIVERS_INTEL_USB4_RETIMER=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y # end of Generic Drivers # @@ -712,6 +750,7 @@ CONFIG_DRIVERS_INTEL_USB4_RETIMER=y # Verified Boot (vboot) # CONFIG_VBOOT_LIB=y + # end of Verified Boot (vboot) # @@ -722,7 +761,6 @@ CONFIG_TPM2=y CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM2=y # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM2=y # CONFIG_TPM_HASH_SHA1 is not set @@ -768,7 +806,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y CONFIG_RTC=y -CONFIG_HEAP_SIZE=0x100000 # # Console @@ -783,7 +820,6 @@ CONFIG_CONSOLE_CBMEM=y # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set -# CONFIG_CONSOLE_SYSTEM76_EC is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set @@ -794,8 +830,8 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 -CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y -CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set +# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set # CONFIG_CMOS_POST is not set CONFIG_HWBASE_DEBUG_CB=y # end of Console @@ -819,6 +855,7 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" # # CONFIG_PAYLOAD_NONE is not set # CONFIG_PAYLOAD_ELF is not set +# CONFIG_PAYLOAD_FLAT_BINARY is not set # CONFIG_PAYLOAD_BOOTBOOT is not set # CONFIG_PAYLOAD_FILO is not set # CONFIG_PAYLOAD_GRUB2 is not set @@ -838,7 +875,6 @@ CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" # # end of Dasharo specific payload options -# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -882,7 +918,6 @@ CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set CONFIG_HAVE_DEBUG_GPIO=y # CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_CBFS is not set From 9085dfb26bff37de9fbb93c6a4006b76b3290cad Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Filip=20Lewi=C5=84ski?= Date: Tue, 14 Apr 2026 09:33:00 +0200 Subject: [PATCH 16/25] modules/coreboot: remove redundant sed MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Filip Lewiński --- modules/coreboot | 1 - 1 file changed, 1 deletion(-) diff --git a/modules/coreboot b/modules/coreboot index 56dcd923c..f9f07c1ec 100644 --- a/modules/coreboot +++ b/modules/coreboot @@ -199,7 +199,6 @@ $(coreboot_module)_configure := \ sed -i '/^CONFIG_MAINBOARD_SMBIOS_MANUFACTURER/d' $(build)/$(coreboot_dir)/.config; \ echo 'CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="$(CONFIG_COREBOOT_SMBIOS_MANUFACTURER)"' >> $(build)/$(coreboot_dir)/.config; \ fi; \ - sed -i 's|@COREBOOT_BUILD_DIR@|$(build)/$(coreboot_dir)|g' "$(build)/$(coreboot_dir)/.config"; \ $(MAKE) olddefconfig \ -C "$(build)/$(coreboot_base_dir)" \ obj="$(build)/$(coreboot_dir)" \ From 8aca07b56b22b5b919b8c58c7ef1767600dd552c Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Wed, 15 Apr 2026 13:05:57 -0400 Subject: [PATCH 17/25] circleci: per-architecture workspace cache and docker v0.2.9 Signed-off-by: Thierry Laurion --- .circleci/config.yml | 131 ++++++++++++++++++++++++++++++------------- 1 file changed, 93 insertions(+), 38 deletions(-) diff --git a/.circleci/config.yml b/.circleci/config.yml index 0bddca461..1f0fda868 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -15,7 +15,7 @@ commands: command: | echo "Sourcing /devenv.sh since docker entrypoint doesn't do it as expected" source /devenv.sh - rm -rf build/<< parameters.arch >>/<< parameters.target >>/* build/<< parameters.arch >>/log/* + rm -rf build/<< parameters.arch >>/log/* #Pass AVAILABLE_MEM_GB=8 to respect CircleCI free tier RAM assignation, which otherwise randomly fails. See Makefile calculations. # Without AVAILABLE_MEM_GB=8: CircleCI passes '-j36 --load-average=54' # With AVAILABLE_MEM_GB=8: CircleCI passes '-j8 --load-average=12' @@ -80,13 +80,15 @@ jobs: # Cache for matching modules digest, validated to be exactly the same as in GitHub current commit. # This cache was made on top of below caches, if previously existing. # If no module definition changed, we reuse this one - - nix-docker-heads-modules-and-patches-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} - + # x86 caches + - nix-docker-heads-modules-x86-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - nix-docker-heads-coreboot-musl-cross-make-x86-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - nix-docker-heads-musl-cross-make-x86-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} # Cache for coreboot module (and patches) and musl-cross-make digests (coreboot: triannual release) - - nix-docker-heads-coreboot-musl-cross-make-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} - - # Cache for musl-cross-make module digest (rarely modified). - - nix-docker-heads-musl-cross-make-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + # ppc64 caches + - nix-docker-heads-modules-ppc64-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - nix-docker-heads-coreboot-musl-cross-make-ppc64-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - nix-docker-heads-musl-cross-make-ppc64-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} - run: name: Download and neuter xx20 ME (keep generated GBE and extracted IFD in tree) command: | @@ -173,7 +175,7 @@ jobs: target: <> subcommand: <> - save_cache: + save_cache_x86: docker: # Docker image: tlaurion/heads-dev-env:v0.2.9 - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de @@ -185,19 +187,16 @@ jobs: - save_cache: # Generate cache for the same musl-cross-make module definition if hash is not previously existing # CircleCI removed their wildcard support, so we have to list precise versions to cache in directory names - key: nix-docker-heads-musl-cross-make-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + key: nix-docker-heads-musl-cross-make-x86-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} paths: - - build/ppc64/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c - build/x86/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c - - crossgcc - - packages + - crossgcc/x86 + - packages/x86 - save_cache: # Generate cache for the same coreboot and musl-cross-make modules definition if hash is not previously existing # CircleCI removed their wildcard support, so we have to list precise versions to cache in directory names - key: nix-docker-heads-coreboot-musl-cross-make-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + key: nix-docker-heads-coreboot-musl-cross-make-x86-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} paths: - - build/ppc64/coreboot-talos_2 - - build/ppc64/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c - build/x86/coreboot-4.11 - build/x86/coreboot-24.02.01 - build/x86/coreboot-25.09 @@ -207,16 +206,53 @@ jobs: - build/x86/coreboot-dasharo_msi_z690 - build/x86/coreboot-purism - build/x86/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c - - crossgcc - - packages + - crossgcc/x86 + - packages/x86 + - save_cache: + # Generate cache for the exact same modules definitions if hash is not previously existing + key: nix-docker-heads-modules-x86-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} + paths: + - build/x86 + - install/x86 + - crossgcc/x86 + - packages/x86 + + + + save_cache_ppc64: + docker: + # Docker image: tlaurion/heads-dev-env:v0.2.9 + - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de + resource_class: large + working_directory: ~/heads + steps: + - attach_workspace: + at: ~/heads + - save_cache: + # Generate cache for the same musl-cross-make module definition if hash is not previously existing + # CircleCI removed their wildcard support, so we have to list precise versions to cache in directory names + key: nix-docker-heads-musl-cross-make-ppc64-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + paths: + - build/ppc64/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c + - crossgcc/ppc64 + - packages/ppc64 + - save_cache: + # Generate cache for the same coreboot and musl-cross-make modules definition if hash is not previously existing + # CircleCI removed their wildcard support, so we have to list precise versions to cache in directory names + key: nix-docker-heads-coreboot-musl-cross-make-ppc64-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + paths: + - build/ppc64/coreboot-talos_2 + - build/ppc64/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c + - crossgcc/ppc64 + - packages/ppc64 - save_cache: # Generate cache for the exact same modules definitions if hash is not previously existing - key: nix-docker-heads-modules-and-patches-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} + key: nix-docker-heads-modules-ppc64-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} paths: - - build - - crossgcc - - install - - packages + - build/ppc64 + - install/ppc64 + - crossgcc/ppc64 + - packages/ppc64 workflows: version: 2 @@ -253,13 +289,13 @@ workflows: requires: - x86-musl-cross-make - # coreboot purism: based on coreboot 24.02.01, reuse dasharo 24.02.01 crossgcc + # coreboot purism: builds 24.02.01 toolchain, all librem boards share it - build_and_persist: name: librem_14 target: librem_14 subcommand: "" requires: - - novacustom-nv4x_adl + - x86-musl-cross-make # t480 is based on 25.09 coreboot release, not sharing any buildstack from now, depend on muscl-cross cache - build_and_persist: @@ -286,7 +322,7 @@ workflows: requires: - x86-musl-cross-make - # dasharo_msi + # dasharo_msi: builds its own toolchain, msi_z690a_ddr5 depends on it - build_and_persist: name: UNTESTED_msi_z690a_ddr4 target: UNTESTED_msi_z690a_ddr4 @@ -294,12 +330,29 @@ workflows: requires: - x86-musl-cross-make - # Cache one workspace per architecture - # Make sure workspace caches are chainloaded and the last in chain for an arch is saved - - save_cache: + # Dasharo forks: each fork builds its own toolchain (FSP header incompatibilities) + # - novacustom-nv4x_adl: builds dasharo_nv4x toolchain, nitropad-ns50 reuses it + # - novacustom-v560tu: builds dasharo_v56 toolchain, v540tu reuses it + # - UNTESTED_msi_z690a_ddr4: builds dasharo_msi_z690 toolchain, msi_z690a_ddr5 reuses it + # - UNTESTED_msi_z790p_ddr4: builds dasharo_msi_z790 toolchain, msi_z790p_ddr5 reuses it + + # x86: combines x86 workspaces and saves x86 cache + # Workspaces combined: x86-musl-cross-make, novacustom-nv4x_adl, librem_14, + # EOL_t480-hotp-maximized, EOL_librem_l1um, UNTESTED_msi_z690a_ddr4 + - save_cache_x86: requires: - - UNTESTED_talos-2 + - x86-musl-cross-make + - novacustom-nv4x_adl + - librem_14 - EOL_t480-hotp-maximized + - EOL_librem_l1um + - UNTESTED_msi_z690a_ddr4 + + # ppc64: combines ppc64 workspaces and saves ppc64 cache + # Workspaces combined: ppc64-musl-cross-make, UNTESTED_talos-2 + - save_cache_ppc64: + requires: + - UNTESTED_talos-2 # Those onboarding new boards should add their entries below. # coreboot 25.09 boards @@ -485,8 +538,7 @@ workflows: requires: - EOL_t480-hotp-maximized - # coreboot purism - # librem boards + # librem boards: share purism 24.02.01 toolchain with librem_14 - build: name: EOL_librem_13v2 target: EOL_librem_13v2 @@ -565,7 +617,7 @@ workflows: requires: - EOL_t480-hotp-maximized - # dasharo release, share 24.02.01 utils/crossgcc + # Dasharo nv4x: shares dasharo_nv4x toolchain with novacustom-nv4x_adl - build: name: UNTESTED_nitropad-ns50 target: UNTESTED_nitropad-ns50 @@ -573,22 +625,23 @@ workflows: requires: - novacustom-nv4x_adl - #NovaCustom v56 boards are based on coreboot 24.02.01 fork, so depend on nv4x_adl + # NovaCustom v56: builds dasharo_v56 toolchain - build: name: novacustom-v560tu target: novacustom-v560tu subcommand: "" requires: - - novacustom-nv4x_adl + - x86-musl-cross-make + # NovaCustom v56: shares dasharo_v56 toolchain with novacustom-v560tu - build: name: novacustom-v540tu target: novacustom-v540tu subcommand: "" requires: - - novacustom-nv4x_adl + - novacustom-v560tu - # dasharo_msi + # Dasharo msi_z690: shares dasharo_msi_z690 toolchain with UNTESTED_msi_z690a_ddr4 - build: name: UNTESTED_msi_z690a_ddr5 target: UNTESTED_msi_z690a_ddr5 @@ -596,16 +649,18 @@ workflows: requires: - UNTESTED_msi_z690a_ddr4 + # Dasharo msi_z790: builds dasharo_msi_z790 toolchain - build: name: UNTESTED_msi_z790p_ddr4 target: UNTESTED_msi_z790p_ddr4 subcommand: "" requires: - - UNTESTED_msi_z690a_ddr4 + - x86-musl-cross-make + # Dasharo msi_z790: shares dasharo_msi_z790 toolchain with UNTESTED_msi_z790p_ddr4 - build: name: msi_z790p_ddr5 target: msi_z790p_ddr5 subcommand: "" requires: - - UNTESTED_msi_z690a_ddr4 + - UNTESTED_msi_z790p_ddr4 From 6748d81cf066e060719135e4a7f489f003968f04 Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Wed, 15 Apr 2026 13:06:05 -0400 Subject: [PATCH 18/25] bin/fetch_source_archive.sh: log mirror fallbacks Signed-off-by: Thierry Laurion --- bin/fetch_source_archive.sh | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/bin/fetch_source_archive.sh b/bin/fetch_source_archive.sh index 0738395ff..125b479f2 100755 --- a/bin/fetch_source_archive.sh +++ b/bin/fetch_source_archive.sh @@ -75,6 +75,11 @@ rm -f "$FILE" "$TMP_FILE" # Try the primary source download "$URL" && exit 0 +# Log mirror fallback for developer awareness +MIRROR_LOG="${MIRROR_LOG:-build/mirror_fallbacks.log}" +mkdir -p "$(dirname "$MIRROR_LOG")" +echo "$(date -Iseconds) MIRROR_FALLBACK primary=$URL" >>"$MIRROR_LOG" + # Shuffle the mirrors so we try each equally readarray -t BACKUP_MIRRORS < <(shuf -e "${BACKUP_MIRRORS[@]}") @@ -86,7 +91,10 @@ archive="$(basename "$FILE")" echo "Try mirrors for $archive" >&2 for mirror in "${BACKUP_MIRRORS[@]}"; do - download "$mirror$archive" && exit 0 + if download "$mirror$archive"; then + echo "$(date -Iseconds) MIRROR_USED mirror=$mirror$archive" >>"$MIRROR_LOG" + exit 0 + fi done # All mirrors failed From 9963878e348f9dab4357875d065c8d20f2d07f46 Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Wed, 15 Apr 2026 13:06:13 -0400 Subject: [PATCH 19/25] config/coreboot-talos-2: set LOCALVERSION to v0.7.0 Signed-off-by: Thierry Laurion --- config/coreboot-talos-2.config | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/config/coreboot-talos-2.config b/config/coreboot-talos-2.config index 8896e9e1c..764e238eb 100644 --- a/config/coreboot-talos-2.config +++ b/config/coreboot-talos-2.config @@ -7,7 +7,7 @@ # General setup # CONFIG_COREBOOT_BUILD=y -CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION="0.7.0" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set From 079a5f7c9a2e1118bcd4b00ccb0052fd7e1a0e62 Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Wed, 15 Apr 2026 13:06:27 -0400 Subject: [PATCH 20/25] MSI/Nitropad boards: add common security settings Signed-off-by: Thierry Laurion --- config/coreboot-msi_z690a_ddr4.config | 35 +++++++++++++---------- config/coreboot-msi_z690a_ddr5.config | 35 +++++++++++++---------- config/coreboot-msi_z790p_ddr4.config | 35 +++++++++++++---------- config/coreboot-msi_z790p_ddr5.config | 35 +++++++++++++---------- config/coreboot-nitropad-ns50.config | 41 ++++++++++++++------------- 5 files changed, 101 insertions(+), 80 deletions(-) diff --git a/config/coreboot-msi_z690a_ddr4.config b/config/coreboot-msi_z690a_ddr4.config index dbedc1f85..c60699b0d 100644 --- a/config/coreboot-msi_z690a_ddr4.config +++ b/config/coreboot-msi_z690a_ddr4.config @@ -6,7 +6,7 @@ # # General setup # -CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION="v1.1.6" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set @@ -162,7 +162,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/descriptor.bin" CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x100000 -CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=37 +CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=29 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y CONFIG_GBB_HWID="MSI_MS7D25" @@ -286,8 +286,7 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=32 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254 CONFIG_INTEL_GMA_BCLM_WIDTH=32 CONFIG_FSP_PUBLISH_MBP_HOB=y -CONFIG_INCLUDE_HSPHY_IN_FMAP=y -CONFIG_HSPHY_FW_FILE="" +# CONFIG_INCLUDE_HSPHY_IN_FMAP is not set CONFIG_HSPHY_FW_MAX_SIZE=0x8000 CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 @@ -416,7 +415,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y -# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y @@ -427,6 +426,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y CONFIG_SOC_INTEL_COMMON_PCH_BASE=y CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y @@ -488,8 +488,8 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y -# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set -CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -626,6 +626,7 @@ CONFIG_MRC_SETTINGS_PROTECT=y CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y # CONFIG_TPM_PPI is not set @@ -735,9 +736,12 @@ CONFIG_INTEL_TXT_LIB=y # CONFIG_INTEL_TXT is not set # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set -CONFIG_BOOTMEDIA_LOCK_NONE=y -# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_NONE is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y # CONFIG_BOOTMEDIA_LOCK_CHIP is not set +CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y +# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set +# CONFIG_BOOTMEDIA_LOCK_WPRO_VBOOT_RO is not set # CONFIG_BOOTMEDIA_SMM_BWP is not set # end of Security @@ -783,23 +787,23 @@ CONFIG_CONSOLE_CBMEM=y # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set -CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y -CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0 -# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set -# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y # CONFIG_CMOS_POST is not set CONFIG_POST_DEVICE_NONE=y # CONFIG_POST_DEVICE_LPC is not set # CONFIG_POST_DEVICE_PCI_PCIE is not set CONFIG_POST_IO_PORT=0x80 -CONFIG_HWBASE_DEBUG_NULL=y +CONFIG_HWBASE_DEBUG_CB=y # end of Console CONFIG_ACPI_S1_NOT_SUPPORTED=y @@ -889,6 +893,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set # CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_BOOT_STATE is not set diff --git a/config/coreboot-msi_z690a_ddr5.config b/config/coreboot-msi_z690a_ddr5.config index 960614ef0..573a57ae0 100644 --- a/config/coreboot-msi_z690a_ddr5.config +++ b/config/coreboot-msi_z690a_ddr5.config @@ -6,7 +6,7 @@ # # General setup # -CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION="v1.1.6" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set @@ -162,7 +162,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/descriptor.bin" CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x100000 -CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=37 +CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=29 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y CONFIG_GBB_HWID="MSI_MS7D25" @@ -286,8 +286,7 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=32 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254 CONFIG_INTEL_GMA_BCLM_WIDTH=32 CONFIG_FSP_PUBLISH_MBP_HOB=y -CONFIG_INCLUDE_HSPHY_IN_FMAP=y -CONFIG_HSPHY_FW_FILE="" +# CONFIG_INCLUDE_HSPHY_IN_FMAP is not set CONFIG_HSPHY_FW_MAX_SIZE=0x8000 CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 @@ -416,7 +415,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y -# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y @@ -427,6 +426,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y CONFIG_SOC_INTEL_COMMON_PCH_BASE=y CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y @@ -488,8 +488,8 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y -# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set -CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -626,6 +626,7 @@ CONFIG_MRC_SETTINGS_PROTECT=y CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y # CONFIG_TPM_PPI is not set @@ -735,9 +736,12 @@ CONFIG_INTEL_TXT_LIB=y # CONFIG_INTEL_TXT is not set # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set -CONFIG_BOOTMEDIA_LOCK_NONE=y -# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_NONE is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y # CONFIG_BOOTMEDIA_LOCK_CHIP is not set +CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y +# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set +# CONFIG_BOOTMEDIA_LOCK_WPRO_VBOOT_RO is not set # CONFIG_BOOTMEDIA_SMM_BWP is not set # end of Security @@ -783,23 +787,23 @@ CONFIG_CONSOLE_CBMEM=y # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set -CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y -CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0 -# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set -# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y # CONFIG_CMOS_POST is not set CONFIG_POST_DEVICE_NONE=y # CONFIG_POST_DEVICE_LPC is not set # CONFIG_POST_DEVICE_PCI_PCIE is not set CONFIG_POST_IO_PORT=0x80 -CONFIG_HWBASE_DEBUG_NULL=y +CONFIG_HWBASE_DEBUG_CB=y # end of Console CONFIG_ACPI_S1_NOT_SUPPORTED=y @@ -889,6 +893,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set # CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_BOOT_STATE is not set diff --git a/config/coreboot-msi_z790p_ddr4.config b/config/coreboot-msi_z790p_ddr4.config index d5b1a17a5..f16fb5949 100644 --- a/config/coreboot-msi_z790p_ddr4.config +++ b/config/coreboot-msi_z790p_ddr4.config @@ -6,7 +6,7 @@ # # General setup # -CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION="v0.9.4" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set @@ -162,7 +162,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/descriptor.bin" CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x100000 -CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=37 +CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=29 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y CONFIG_GBB_HWID="MSI_MS7E06" @@ -287,8 +287,7 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=32 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254 CONFIG_INTEL_GMA_BCLM_WIDTH=32 CONFIG_FSP_PUBLISH_MBP_HOB=y -CONFIG_INCLUDE_HSPHY_IN_FMAP=y -CONFIG_HSPHY_FW_FILE="" +# CONFIG_INCLUDE_HSPHY_IN_FMAP is not set CONFIG_HSPHY_FW_MAX_SIZE=0x8000 CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 @@ -417,7 +416,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y -# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y @@ -428,6 +427,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y CONFIG_SOC_INTEL_COMMON_PCH_BASE=y CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y @@ -489,8 +489,8 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y -# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set -CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -627,6 +627,7 @@ CONFIG_MRC_SETTINGS_PROTECT=y CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y # CONFIG_TPM_PPI is not set @@ -736,9 +737,12 @@ CONFIG_INTEL_TXT_LIB=y # CONFIG_INTEL_TXT is not set # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set -CONFIG_BOOTMEDIA_LOCK_NONE=y -# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_NONE is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y # CONFIG_BOOTMEDIA_LOCK_CHIP is not set +CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y +# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set +# CONFIG_BOOTMEDIA_LOCK_WPRO_VBOOT_RO is not set # CONFIG_BOOTMEDIA_SMM_BWP is not set # end of Security @@ -784,23 +788,23 @@ CONFIG_CONSOLE_CBMEM=y # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set -CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y -CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0 -# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set -# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y # CONFIG_CMOS_POST is not set CONFIG_POST_DEVICE_NONE=y # CONFIG_POST_DEVICE_LPC is not set # CONFIG_POST_DEVICE_PCI_PCIE is not set CONFIG_POST_IO_PORT=0x80 -CONFIG_HWBASE_DEBUG_NULL=y +CONFIG_HWBASE_DEBUG_CB=y # end of Console CONFIG_ACPI_S1_NOT_SUPPORTED=y @@ -890,6 +894,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set # CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_BOOT_STATE is not set diff --git a/config/coreboot-msi_z790p_ddr5.config b/config/coreboot-msi_z790p_ddr5.config index 1598aac8d..83c9fdb06 100644 --- a/config/coreboot-msi_z790p_ddr5.config +++ b/config/coreboot-msi_z790p_ddr5.config @@ -6,7 +6,7 @@ # # General setup # -CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION="v0.9.4" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set @@ -162,7 +162,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/descriptor.bin" CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x100000 -CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=37 +CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=29 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y CONFIG_GBB_HWID="MSI_MS7E06" @@ -287,8 +287,7 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=32 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254 CONFIG_INTEL_GMA_BCLM_WIDTH=32 CONFIG_FSP_PUBLISH_MBP_HOB=y -CONFIG_INCLUDE_HSPHY_IN_FMAP=y -CONFIG_HSPHY_FW_FILE="" +# CONFIG_INCLUDE_HSPHY_IN_FMAP is not set CONFIG_HSPHY_FW_MAX_SIZE=0x8000 CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 @@ -417,7 +416,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y -# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y @@ -428,6 +427,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y CONFIG_SOC_INTEL_COMMON_PCH_BASE=y CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y @@ -489,8 +489,8 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y -# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set -CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -627,6 +627,7 @@ CONFIG_MRC_SETTINGS_PROTECT=y CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y # CONFIG_TPM_PPI is not set @@ -736,9 +737,12 @@ CONFIG_INTEL_TXT_LIB=y # CONFIG_INTEL_TXT is not set # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set -CONFIG_BOOTMEDIA_LOCK_NONE=y -# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_NONE is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y # CONFIG_BOOTMEDIA_LOCK_CHIP is not set +CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y +# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set +# CONFIG_BOOTMEDIA_LOCK_WPRO_VBOOT_RO is not set # CONFIG_BOOTMEDIA_SMM_BWP is not set # end of Security @@ -784,23 +788,23 @@ CONFIG_CONSOLE_CBMEM=y # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set -CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y -CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0 -# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set -# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y # CONFIG_CMOS_POST is not set CONFIG_POST_DEVICE_NONE=y # CONFIG_POST_DEVICE_LPC is not set # CONFIG_POST_DEVICE_PCI_PCIE is not set CONFIG_POST_IO_PORT=0x80 -CONFIG_HWBASE_DEBUG_NULL=y +CONFIG_HWBASE_DEBUG_CB=y # end of Console CONFIG_ACPI_S1_NOT_SUPPORTED=y @@ -890,6 +894,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set # CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_BOOT_STATE is not set diff --git a/config/coreboot-nitropad-ns50.config b/config/coreboot-nitropad-ns50.config index f5196cfcc..c76d2ed4d 100644 --- a/config/coreboot-nitropad-ns50.config +++ b/config/coreboot-nitropad-ns50.config @@ -16,8 +16,9 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y -# CONFIG_USE_OPTION_TABLE is not set +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_STATIC_OPTION_TABLE is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -36,6 +37,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_UPDATE_IMAGE is not set CONFIG_BOOTSPLASH_IMAGE=y CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_REGION_LOGO_FILE="" CONFIG_BOOTSPLASH_CONVERT=y CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_BOOTSPLASH_CONVERT_RESIZE is not set @@ -125,7 +127,7 @@ CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=512 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="Clevo" +CONFIG_MAINBOARD_VENDOR="Notebook" CONFIG_CBFS_SIZE=0x1000000 # CONFIG_CONSOLE_SERIAL is not set CONFIG_MAX_CPUS=24 @@ -142,7 +144,7 @@ CONFIG_VBOOT_VBNV_OFFSET=0x28 CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y -CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Notebook" +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Nitrokey" CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 CONFIG_ECAM_MMCONF_BUS_NUMBER=256 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" @@ -150,7 +152,7 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x4000 -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="NS5x_NS7xPU" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Nitropad NS51" CONFIG_CONSOLE_POST=y CONFIG_FSP_FD_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/FSP.fd" CONFIG_MAX_SOCKET=1 @@ -165,7 +167,6 @@ CONFIG_TPM_PIRQ=0x27 CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)" # CONFIG_DEBUG_SMI is not set CONFIG_EC_DASHARO_EC_BAT_THRESHOLDS=y -CONFIG_PXE_ROM_ID="10ec,8168" CONFIG_DCACHE_RAM_BASE=0xfef00000 CONFIG_DCACHE_RAM_SIZE=0xc0000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -211,7 +212,6 @@ CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000 CONFIG_EC_DASHARO_EC_CPU_FAN_COUNT=1 CONFIG_D3COLD_SUPPORT=y CONFIG_TPM_MEASURED_BOOT=y -CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 @@ -221,6 +221,7 @@ CONFIG_EC_GPE_SCI=0x50 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" CONFIG_EC_STARLABS_BATTERY_TYPE="LION" CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" CONFIG_BOARD_ROMSIZE_KB_32768=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set @@ -301,7 +302,7 @@ CONFIG_SOC_INTEL_UART_DEV_MAX=7 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff CONFIG_FSP_TYPE_IOT=y -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/Include/" +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 CONFIG_DATA_BUS_WIDTH=128 CONFIG_DIMMS_PER_CHANNEL=2 @@ -319,6 +320,7 @@ CONFIG_HSPHY_FW_MAX_SIZE=0x8000 CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_MAX_HECI_DEVICES=6 +CONFIG_MAX_MEI_DEVICES=4 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_HAVE_PAM0_REGISTER=y CONFIG_PCIEXP_COMMON_CLOCK=y @@ -450,8 +452,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y -CONFIG_FIRMWARE_CONNECTION_MANAGER=y -# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set +# CONFIG_FIRMWARE_CONNECTION_MANAGER is not set +CONFIG_SOFTWARE_CONNECTION_MANAGER=y CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y CONFIG_ENABLE_EARLY_DMA_PROTECTION=y CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y @@ -540,8 +542,7 @@ CONFIG_RCBA_LENGTH=0x4000 # CONFIG_EC_ACPI=y CONFIG_EC_DASHARO_EC=y -CONFIG_EC_DASHARO_EC_UPDATE=y -CONFIG_EC_DASHARO_EC_UPDATE_FILE="ec.rom" +# CONFIG_EC_DASHARO_EC_UPDATE is not set # # Intel Firmware @@ -641,8 +642,9 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set -CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y -CONFIG_PCIEXP_HOTPLUG_IO=0x2000 +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y +# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set +CONFIG_PCIEXP_HOTPLUG_IO=0x800 # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 @@ -670,6 +672,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set CONFIG_DRIVERS_UART=y CONFIG_NO_UART_ON_SUPERIO=y CONFIG_DRIVERS_UART_8250MEM=y @@ -719,7 +722,6 @@ CONFIG_INTEL_GMA_OPREGION_2_1=y CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set -# CONFIG_BMP_LOGO is not set # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y # CONFIG_USE_PC_CMOS_ALTCENTURY is not set @@ -733,7 +735,6 @@ CONFIG_DRIVERS_MTK_WIFI=y CONFIG_MP_SERVICES_PPI=y CONFIG_MP_SERVICES_PPI_V2=y CONFIG_DRIVERS_INTEL_USB4_RETIMER=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y # end of Generic Drivers # @@ -750,7 +751,6 @@ CONFIG_HAVE_FSP_LOGO_SUPPORT=y # Verified Boot (vboot) # CONFIG_VBOOT_LIB=y - # end of Verified Boot (vboot) # @@ -762,6 +762,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM2=y # CONFIG_DEBUG_TPM is not set # CONFIG_TPM_LOG_CB is not set +# CONFIG_TPM_LOG_TCG is not set CONFIG_TPM_LOG_TPM2=y # CONFIG_TPM_HASH_SHA1 is not set CONFIG_TPM_HASH_SHA256=y @@ -830,8 +831,8 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 -# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set -# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y # CONFIG_CMOS_POST is not set CONFIG_HWBASE_DEBUG_CB=y # end of Console @@ -866,9 +867,9 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" # CONFIG_PAYLOAD_EDK2 is not set CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" -CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_DASHARO is not set # # Dasharo specific payload options From c0f1dbc47ef050a47b04574ba9f668f13faa0252 Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Wed, 15 Apr 2026 13:06:36 -0400 Subject: [PATCH 21/25] Dasharo boards: update coreboot configs Signed-off-by: Thierry Laurion --- config/coreboot-novacustom-nv4x_adl.config | 23 ++++++++++++---------- config/coreboot-novacustom-v540tu.config | 11 +++++++---- config/coreboot-novacustom-v560tu.config | 11 +++++++---- 3 files changed, 27 insertions(+), 18 deletions(-) diff --git a/config/coreboot-novacustom-nv4x_adl.config b/config/coreboot-novacustom-nv4x_adl.config index c05293387..665b4ac47 100644 --- a/config/coreboot-novacustom-nv4x_adl.config +++ b/config/coreboot-novacustom-nv4x_adl.config @@ -36,6 +36,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_UPDATE_IMAGE is not set CONFIG_BOOTSPLASH_IMAGE=y CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_REGION_LOGO_FILE="" CONFIG_BOOTSPLASH_CONVERT=y CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 # CONFIG_BOOTSPLASH_CONVERT_RESIZE is not set @@ -125,7 +126,7 @@ CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=512 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="Clevo" +CONFIG_MAINBOARD_VENDOR="Notebook" CONFIG_CBFS_SIZE=0x1000000 # CONFIG_CONSOLE_SERIAL is not set CONFIG_MAX_CPUS=24 @@ -165,7 +166,6 @@ CONFIG_TPM_PIRQ=0x27 CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)" # CONFIG_DEBUG_SMI is not set CONFIG_EC_DASHARO_EC_BAT_THRESHOLDS=y -CONFIG_PXE_ROM_ID="10ec,8168" CONFIG_DCACHE_RAM_BASE=0xfef00000 CONFIG_DCACHE_RAM_SIZE=0xc0000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -211,7 +211,6 @@ CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000 CONFIG_EC_DASHARO_EC_CPU_FAN_COUNT=1 CONFIG_D3COLD_SUPPORT=y CONFIG_TPM_MEASURED_BOOT=y -CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 @@ -221,6 +220,7 @@ CONFIG_EC_GPE_SCI=0x50 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" CONFIG_EC_STARLABS_BATTERY_TYPE="LION" CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" CONFIG_BOARD_ROMSIZE_KB_32768=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set @@ -319,6 +319,7 @@ CONFIG_HSPHY_FW_MAX_SIZE=0x8000 CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 CONFIG_MAX_HECI_DEVICES=6 +CONFIG_MAX_MEI_DEVICES=4 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_HAVE_PAM0_REGISTER=y CONFIG_PCIEXP_COMMON_CLOCK=y @@ -642,8 +643,9 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set -CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y -CONFIG_PCIEXP_HOTPLUG_IO=0x2000 +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y +# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set +CONFIG_PCIEXP_HOTPLUG_IO=0x800 # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 @@ -671,6 +673,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set CONFIG_DRIVERS_UART=y CONFIG_NO_UART_ON_SUPERIO=y CONFIG_DRIVERS_UART_8250MEM=y @@ -720,9 +723,9 @@ CONFIG_INTEL_GMA_OPREGION_2_1=y CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set -# CONFIG_BMP_LOGO is not set # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_MEMORY_MAPPED_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 @@ -733,7 +736,6 @@ CONFIG_DRIVERS_MTK_WIFI=y CONFIG_MP_SERVICES_PPI=y CONFIG_MP_SERVICES_PPI_V2=y CONFIG_DRIVERS_INTEL_USB4_RETIMER=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y # end of Generic Drivers # @@ -761,6 +763,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM2=y # CONFIG_DEBUG_TPM is not set # CONFIG_TPM_LOG_CB is not set +# CONFIG_TPM_LOG_TCG is not set CONFIG_TPM_LOG_TPM2=y # CONFIG_TPM_HASH_SHA1 is not set CONFIG_TPM_HASH_SHA256=y @@ -829,8 +832,8 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 -# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set -# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y # CONFIG_CMOS_POST is not set CONFIG_HWBASE_DEBUG_CB=y # end of Console @@ -865,9 +868,9 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" # CONFIG_PAYLOAD_EDK2 is not set CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" -CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_DASHARO is not set # # Dasharo specific payload options diff --git a/config/coreboot-novacustom-v540tu.config b/config/coreboot-novacustom-v540tu.config index 56a44f5c5..7dcd4f1c8 100644 --- a/config/coreboot-novacustom-v540tu.config +++ b/config/coreboot-novacustom-v540tu.config @@ -177,7 +177,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/descriptor.bin" CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x40000 -CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=36 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y CONFIG_HAVE_IFD_BIN=y @@ -293,7 +292,6 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=6 CONFIG_SOC_INTEL_UART_DEV_MAX=3 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff -CONFIG_FSP_TYPE_IOT=y CONFIG_FSP_HEADER_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Include" CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 CONFIG_DATA_BUS_WIDTH=128 @@ -656,7 +654,10 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000 CONFIG_PCI_ALLOW_BUS_MASTER=y CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y +# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set CONFIG_PCIEXP_HOTPLUG_IO=0x800 # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 @@ -686,6 +687,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set CONFIG_DRIVERS_UART=y CONFIG_NO_UART_ON_SUPERIO=y CONFIG_DRIVERS_UART_8250MEM=y @@ -701,7 +703,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y CONFIG_DRIVERS_I2C_GENERIC=y CONFIG_DRIVERS_I2C_HID=y # CONFIG_DRIVERS_I2C_MAX98396 is not set -CONFIG_FSP_USE_REPO=y # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set # CONFIG_BMP_LOGO is not set @@ -710,7 +711,6 @@ CONFIG_PLATFORM_USES_FSP2_1=y CONFIG_PLATFORM_USES_FSP2_2=y CONFIG_PLATFORM_USES_FSP2_3=y CONFIG_PLATFORM_USES_FSP2_X86_32=y -CONFIG_HAVE_INTEL_FSP_REPO=y CONFIG_ADD_FSP_BINARIES=y CONFIG_FSP_S_CBFS="fsps.bin" CONFIG_FSP_M_CBFS="fspm.bin" @@ -738,6 +738,7 @@ CONFIG_INTEL_GMA_OPREGION_2_1=y CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y # CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 @@ -779,6 +780,7 @@ CONFIG_MAINBOARD_HAS_TPM2=y # CONFIG_TPM_LOG_CB is not set # CONFIG_TPM_LOG_TCG is not set CONFIG_TPM_LOG_TPM2=y +# CONFIG_TPM_HASH_SHA1 is not set CONFIG_TPM_HASH_SHA256=y # CONFIG_TPM_HASH_SHA384 is not set # CONFIG_TPM_HASH_SHA512 is not set @@ -883,6 +885,7 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_DASHARO is not set # # Dasharo specific payload options diff --git a/config/coreboot-novacustom-v560tu.config b/config/coreboot-novacustom-v560tu.config index ff72f8604..4f9565344 100644 --- a/config/coreboot-novacustom-v560tu.config +++ b/config/coreboot-novacustom-v560tu.config @@ -177,7 +177,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/descriptor.bin" CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x40000 -CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=36 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y CONFIG_HAVE_IFD_BIN=y @@ -293,7 +292,6 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=6 CONFIG_SOC_INTEL_UART_DEV_MAX=3 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff -CONFIG_FSP_TYPE_IOT=y CONFIG_FSP_HEADER_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Include" CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 CONFIG_DATA_BUS_WIDTH=128 @@ -656,7 +654,10 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000 CONFIG_PCI_ALLOW_BUS_MASTER=y CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y +# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set CONFIG_PCIEXP_HOTPLUG_IO=0x800 # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 @@ -686,6 +687,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_SPI_FLASH_SMM=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set CONFIG_DRIVERS_UART=y CONFIG_NO_UART_ON_SUPERIO=y CONFIG_DRIVERS_UART_8250MEM=y @@ -701,7 +703,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y CONFIG_DRIVERS_I2C_GENERIC=y CONFIG_DRIVERS_I2C_HID=y # CONFIG_DRIVERS_I2C_MAX98396 is not set -CONFIG_FSP_USE_REPO=y # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set # CONFIG_BMP_LOGO is not set @@ -710,7 +711,6 @@ CONFIG_PLATFORM_USES_FSP2_1=y CONFIG_PLATFORM_USES_FSP2_2=y CONFIG_PLATFORM_USES_FSP2_3=y CONFIG_PLATFORM_USES_FSP2_X86_32=y -CONFIG_HAVE_INTEL_FSP_REPO=y CONFIG_ADD_FSP_BINARIES=y CONFIG_FSP_S_CBFS="fsps.bin" CONFIG_FSP_M_CBFS="fspm.bin" @@ -738,6 +738,7 @@ CONFIG_INTEL_GMA_OPREGION_2_1=y CONFIG_INTEL_GMA_VERSION_2=y CONFIG_DRIVERS_INTEL_PMC=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y # CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 @@ -779,6 +780,7 @@ CONFIG_MAINBOARD_HAS_TPM2=y # CONFIG_TPM_LOG_CB is not set # CONFIG_TPM_LOG_TCG is not set CONFIG_TPM_LOG_TPM2=y +# CONFIG_TPM_HASH_SHA1 is not set CONFIG_TPM_HASH_SHA256=y # CONFIG_TPM_HASH_SHA384 is not set # CONFIG_TPM_HASH_SHA512 is not set @@ -883,6 +885,7 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_DASHARO is not set # # Dasharo specific payload options From ae41dc88ff3333c52b13b0a83893728ebf8a3b1a Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Wed, 15 Apr 2026 13:17:51 -0400 Subject: [PATCH 22/25] modules/coreboot: add helper to save defconfig alongside original .config Add coreboot.save_in_defconfig_format_backup target that runs savedefconfig and saves the result as .config_defconfig alongside the original .config file. Signed-off-by: Thierry Laurion --- config/coreboot-librem_11.config_defconfig | 22 +++++++++++ config/coreboot-librem_13v2.config_defconfig | 23 +++++++++++ config/coreboot-librem_13v4.config_defconfig | 23 +++++++++++ config/coreboot-librem_14.config_defconfig | 24 ++++++++++++ config/coreboot-librem_15v3.config_defconfig | 23 +++++++++++ config/coreboot-librem_15v4.config_defconfig | 23 +++++++++++ config/coreboot-librem_l1um.config_defconfig | 25 ++++++++++++ .../coreboot-librem_l1um_v2.config_defconfig | 22 +++++++++++ config/coreboot-librem_mini.config_defconfig | 23 +++++++++++ .../coreboot-librem_mini_v2.config_defconfig | 23 +++++++++++ .../coreboot-msi_z690a_ddr4.config_defconfig | 34 +++++++++++++++++ .../coreboot-msi_z690a_ddr5.config_defconfig | 34 +++++++++++++++++ .../coreboot-msi_z790p_ddr4.config_defconfig | 34 +++++++++++++++++ .../coreboot-msi_z790p_ddr5.config_defconfig | 34 +++++++++++++++++ .../coreboot-nitropad-ns50.config_defconfig | 36 ++++++++++++++++++ ...eboot-novacustom-nv4x_adl.config_defconfig | 34 +++++++++++++++++ ...oreboot-novacustom-v540tu.config_defconfig | 38 +++++++++++++++++++ ...oreboot-novacustom-v560tu.config_defconfig | 38 +++++++++++++++++++ ...iplex-7019_9010-maximized.config_defconfig | 30 +++++++++++++++ ...x-7019_9010_TXT-maximized.config_defconfig | 33 ++++++++++++++++ .../coreboot-qemu-tpm1-prod.config_defconfig | 22 +++++++++++ config/coreboot-qemu-tpm1.config_defconfig | 23 +++++++++++ .../coreboot-qemu-tpm2-prod.config_defconfig | 23 +++++++++++ config/coreboot-qemu-tpm2.config_defconfig | 23 +++++++++++ .../coreboot-t420-maximized.config_defconfig | 28 ++++++++++++++ .../coreboot-t430-maximized.config_defconfig | 28 ++++++++++++++ config/coreboot-t440p.config_defconfig | 25 ++++++++++++ .../coreboot-t480-maximized.config_defconfig | 28 ++++++++++++++ .../coreboot-t480s-maximized.config_defconfig | 29 ++++++++++++++ .../coreboot-t530-maximized.config_defconfig | 31 +++++++++++++++ config/coreboot-talos-2.config_defconfig | 10 +++++ .../coreboot-w530-maximized.config_defconfig | 28 ++++++++++++++ config/coreboot-w541.config_defconfig | 26 +++++++++++++ .../coreboot-x220-maximized.config_defconfig | 26 +++++++++++++ ...ot-x230-maximized-fhd_edp.config_defconfig | 28 ++++++++++++++ .../coreboot-x230-maximized.config_defconfig | 31 +++++++++++++++ config/coreboot-z220-cmt.config_defconfig | 35 +++++++++++++++++ modules/coreboot | 9 +++++ 38 files changed, 1029 insertions(+) create mode 100644 config/coreboot-librem_11.config_defconfig create mode 100644 config/coreboot-librem_13v2.config_defconfig create mode 100644 config/coreboot-librem_13v4.config_defconfig create mode 100644 config/coreboot-librem_14.config_defconfig create mode 100644 config/coreboot-librem_15v3.config_defconfig create mode 100644 config/coreboot-librem_15v4.config_defconfig create mode 100644 config/coreboot-librem_l1um.config_defconfig create mode 100644 config/coreboot-librem_l1um_v2.config_defconfig create mode 100644 config/coreboot-librem_mini.config_defconfig create mode 100644 config/coreboot-librem_mini_v2.config_defconfig create mode 100644 config/coreboot-msi_z690a_ddr4.config_defconfig create mode 100644 config/coreboot-msi_z690a_ddr5.config_defconfig create mode 100644 config/coreboot-msi_z790p_ddr4.config_defconfig create mode 100644 config/coreboot-msi_z790p_ddr5.config_defconfig create mode 100644 config/coreboot-nitropad-ns50.config_defconfig create mode 100644 config/coreboot-novacustom-nv4x_adl.config_defconfig create mode 100644 config/coreboot-novacustom-v540tu.config_defconfig create mode 100644 config/coreboot-novacustom-v560tu.config_defconfig create mode 100644 config/coreboot-optiplex-7019_9010-maximized.config_defconfig create mode 100644 config/coreboot-optiplex-7019_9010_TXT-maximized.config_defconfig create mode 100644 config/coreboot-qemu-tpm1-prod.config_defconfig create mode 100644 config/coreboot-qemu-tpm1.config_defconfig create mode 100644 config/coreboot-qemu-tpm2-prod.config_defconfig create mode 100644 config/coreboot-qemu-tpm2.config_defconfig create mode 100644 config/coreboot-t420-maximized.config_defconfig create mode 100644 config/coreboot-t430-maximized.config_defconfig create mode 100644 config/coreboot-t440p.config_defconfig create mode 100644 config/coreboot-t480-maximized.config_defconfig create mode 100644 config/coreboot-t480s-maximized.config_defconfig create mode 100644 config/coreboot-t530-maximized.config_defconfig create mode 100644 config/coreboot-talos-2.config_defconfig create mode 100644 config/coreboot-w530-maximized.config_defconfig create mode 100644 config/coreboot-w541.config_defconfig create mode 100644 config/coreboot-x220-maximized.config_defconfig create mode 100644 config/coreboot-x230-maximized-fhd_edp.config_defconfig create mode 100644 config/coreboot-x230-maximized.config_defconfig create mode 100644 config/coreboot-z220-cmt.config_defconfig diff --git a/config/coreboot-librem_11.config_defconfig b/config/coreboot-librem_11.config_defconfig new file mode 100644 index 000000000..90c0f9988 --- /dev/null +++ b/config/coreboot-librem_11.config_defconfig @@ -0,0 +1,22 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xC00000 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_jsl/librem_11/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_jsl/librem_11/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM_11=y +CONFIG_LINUX_COMMAND_LINE="intel_iommu=igfx_off quiet loglevel=2" +CONFIG_FSP_M_FILE="3rdparty/purism-blobs/mainboard/purism/librem_jsl/librem_11/fspm.bin" +CONFIG_FSP_S_FILE="3rdparty/purism-blobs/mainboard/purism/librem_jsl/librem_11/fsps.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_jsl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_BOOTSPLASH=y +CONFIG_ADD_FSP_BINARIES=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-librem_13v2.config_defconfig b/config/coreboot-librem_13v2.config_defconfig new file mode 100644 index 000000000..7257d2ec0 --- /dev/null +++ b/config/coreboot-librem_13v2.config_defconfig @@ -0,0 +1,23 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_PURISM=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM13_V2=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_skl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-librem_13v4.config_defconfig b/config/coreboot-librem_13v4.config_defconfig new file mode 100644 index 000000000..b05f09916 --- /dev/null +++ b/config/coreboot-librem_13v4.config_defconfig @@ -0,0 +1,23 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_PURISM=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_kbl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_kbl/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM13_V4=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-librem_14.config_defconfig b/config/coreboot-librem_14.config_defconfig new file mode 100644 index 000000000..ca2aa8800 --- /dev/null +++ b/config/coreboot-librem_14.config_defconfig @@ -0,0 +1,24 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xC00000 +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/librem_14/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/librem_14/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM_14=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_cnl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-librem_15v3.config_defconfig b/config/coreboot-librem_15v3.config_defconfig new file mode 100644 index 000000000..c6e40eedc --- /dev/null +++ b/config/coreboot-librem_15v3.config_defconfig @@ -0,0 +1,23 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_PURISM=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM15_V3=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_skl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-librem_15v4.config_defconfig b/config/coreboot-librem_15v4.config_defconfig new file mode 100644 index 000000000..4f7058ddd --- /dev/null +++ b/config/coreboot-librem_15v4.config_defconfig @@ -0,0 +1,23 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_PURISM=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_kbl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_kbl/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM15_V4=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-librem_l1um.config_defconfig b/config/coreboot-librem_l1um.config_defconfig new file mode 100644 index 000000000..4f63c7a3c --- /dev/null +++ b/config/coreboot-librem_l1um.config_defconfig @@ -0,0 +1,25 @@ +CONFIG_USE_BLOBS=y +CONFIG_MEASURED_BOOT=y +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xC00000 +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Librem Server L1UM" +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_l1um/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_l1um/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM_L1UM=y +CONFIG_NO_POST=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=3" +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_FSP_EHCI1_ENABLE=y +CONFIG_FSP_EHCI2_ENABLE=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_l1um/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_DRIVERS_GENERIC_CBFS_SERIAL=y +CONFIG_USER_TPM1=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-librem_l1um_v2.config_defconfig b/config/coreboot-librem_l1um_v2.config_defconfig new file mode 100644 index 000000000..8640b7f1e --- /dev/null +++ b/config/coreboot-librem_l1um_v2.config_defconfig @@ -0,0 +1,22 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_PURISM=y +# CONFIG_CONSOLE_SERIAL is not set +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_l1um_v2/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_l1um_v2/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM_L1UM_V2=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_l1um_v2/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-librem_mini.config_defconfig b/config/coreboot-librem_mini.config_defconfig new file mode 100644 index 000000000..9e7a4927e --- /dev/null +++ b/config/coreboot-librem_mini.config_defconfig @@ -0,0 +1,23 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xC00000 +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini/vbt.bin" +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM_MINI=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_cnl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-librem_mini_v2.config_defconfig b/config/coreboot-librem_mini_v2.config_defconfig new file mode 100644 index 000000000..4b1ed848a --- /dev/null +++ b/config/coreboot-librem_mini_v2.config_defconfig @@ -0,0 +1,23 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xC00000 +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini/vbt.bin" +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini_v2/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini_v2/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM_MINI_V2=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_cnl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-msi_z690a_ddr4.config_defconfig b/config/coreboot-msi_z690a_ddr4.config_defconfig new file mode 100644 index 000000000..e31e86b37 --- /dev/null +++ b/config/coreboot-msi_z690a_ddr4.config_defconfig @@ -0,0 +1,34 @@ +CONFIG_LOCALVERSION="v1.1.6" +CONFIG_VENDOR_MSI=y +CONFIG_CBFS_SIZE=0x1c00000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +# CONFIG_PCIEXP_ASPM is not set +# CONFIG_PCIEXP_L1_SUB_STATE is not set +# CONFIG_PCIEXP_CLK_PM is not set +CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/me.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x100000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_MSI_Z690_A_PRO_WIFI_DDR4=y +CONFIG_MSI_ROMHOLE_IN_CBFS=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="vm.panic_on_oom=1 quiet splash" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_IFDTOOL_DISABLE_ME=y +CONFIG_HAVE_ME_BIN=y +CONFIG_INTEL_ME_DISABLED_HAP=y +CONFIG_UDK_202005_BINDING=y +CONFIG_BOOTSPLASH=y +CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y +CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR=y +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +CONFIG_DRIVERS_PS2_KEYBOARD=y +CONFIG_TPM2=y +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-msi_z690a_ddr5.config_defconfig b/config/coreboot-msi_z690a_ddr5.config_defconfig new file mode 100644 index 000000000..54972780e --- /dev/null +++ b/config/coreboot-msi_z690a_ddr5.config_defconfig @@ -0,0 +1,34 @@ +CONFIG_LOCALVERSION="v1.1.6" +CONFIG_VENDOR_MSI=y +CONFIG_CBFS_SIZE=0x1c00000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +# CONFIG_PCIEXP_ASPM is not set +# CONFIG_PCIEXP_L1_SUB_STATE is not set +# CONFIG_PCIEXP_CLK_PM is not set +CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/me.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x100000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_MSI_Z690_A_PRO_WIFI_DDR5=y +CONFIG_MSI_ROMHOLE_IN_CBFS=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="vm.panic_on_oom=1 quiet splash" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_IFDTOOL_DISABLE_ME=y +CONFIG_HAVE_ME_BIN=y +CONFIG_INTEL_ME_DISABLED_HAP=y +CONFIG_UDK_202005_BINDING=y +CONFIG_BOOTSPLASH=y +CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y +CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR=y +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +CONFIG_DRIVERS_PS2_KEYBOARD=y +CONFIG_TPM2=y +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-msi_z790p_ddr4.config_defconfig b/config/coreboot-msi_z790p_ddr4.config_defconfig new file mode 100644 index 000000000..db4b4dd1f --- /dev/null +++ b/config/coreboot-msi_z790p_ddr4.config_defconfig @@ -0,0 +1,34 @@ +CONFIG_LOCALVERSION="v0.9.4" +CONFIG_VENDOR_MSI=y +CONFIG_CBFS_SIZE=0x1c00000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +# CONFIG_PCIEXP_ASPM is not set +# CONFIG_PCIEXP_L1_SUB_STATE is not set +# CONFIG_PCIEXP_CLK_PM is not set +CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/me.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x100000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_MSI_Z790_P_PRO_WIFI_DDR4=y +CONFIG_MSI_ROMHOLE_IN_CBFS=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="vm.panic_on_oom=1 quiet splash" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_IFDTOOL_DISABLE_ME=y +CONFIG_HAVE_ME_BIN=y +CONFIG_INTEL_ME_DISABLED_HAP=y +CONFIG_UDK_202005_BINDING=y +CONFIG_BOOTSPLASH=y +CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y +CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR=y +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +CONFIG_DRIVERS_PS2_KEYBOARD=y +CONFIG_TPM2=y +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-msi_z790p_ddr5.config_defconfig b/config/coreboot-msi_z790p_ddr5.config_defconfig new file mode 100644 index 000000000..011f7a96a --- /dev/null +++ b/config/coreboot-msi_z790p_ddr5.config_defconfig @@ -0,0 +1,34 @@ +CONFIG_LOCALVERSION="v0.9.4" +CONFIG_VENDOR_MSI=y +CONFIG_CBFS_SIZE=0x1c00000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +# CONFIG_PCIEXP_ASPM is not set +# CONFIG_PCIEXP_L1_SUB_STATE is not set +# CONFIG_PCIEXP_CLK_PM is not set +CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/$(MAINBOARDDIR)/me.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x100000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_MSI_Z790_P_PRO_WIFI_DDR5=y +CONFIG_MSI_ROMHOLE_IN_CBFS=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="vm.panic_on_oom=1 quiet splash" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_IFDTOOL_DISABLE_ME=y +CONFIG_HAVE_ME_BIN=y +CONFIG_INTEL_ME_DISABLED_HAP=y +CONFIG_UDK_202005_BINDING=y +CONFIG_BOOTSPLASH=y +CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y +CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR=y +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +CONFIG_DRIVERS_PS2_KEYBOARD=y +CONFIG_TPM2=y +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-nitropad-ns50.config_defconfig b/config/coreboot-nitropad-ns50.config_defconfig new file mode 100644 index 000000000..f51f45582 --- /dev/null +++ b/config/coreboot-nitropad-ns50.config_defconfig @@ -0,0 +1,36 @@ +CONFIG_LOCALVERSION="v1.8.0" +CONFIG_USE_OPTION_TABLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 +CONFIG_VENDOR_NOVACUSTOM=y +CONFIG_MAINBOARD_VERSION="v2.1" +CONFIG_CBFS_SIZE=0x1000000 +# CONFIG_CONSOLE_SERIAL is not set +# CONFIG_POST_IO is not set +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Nitrokey" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Nitropad NS51" +CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/ns5x_adl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/ns5x_adl/me.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" +CONFIG_SOFTWARE_CONNECTION_MANAGER=y +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_IFDTOOL_DISABLE_ME=y +CONFIG_HAVE_ME_BIN=y +CONFIG_INTEL_ME_DISABLED_HAP=y +CONFIG_BOOTSPLASH=y +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +# CONFIG_TPM_HASH_SHA1 is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-novacustom-nv4x_adl.config_defconfig b/config/coreboot-novacustom-nv4x_adl.config_defconfig new file mode 100644 index 000000000..d5868dac0 --- /dev/null +++ b/config/coreboot-novacustom-nv4x_adl.config_defconfig @@ -0,0 +1,34 @@ +CONFIG_LOCALVERSION="v1.8.0" +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 +CONFIG_VENDOR_NOVACUSTOM=y +CONFIG_MAINBOARD_VERSION="v2.1" +CONFIG_CBFS_SIZE=0x1000000 +# CONFIG_CONSOLE_SERIAL is not set +# CONFIG_POST_IO is not set +CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/nv4x_adl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/nv4x_adl/me.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_NOVACUSTOM_NV4X_ADLP=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_EC_DASHARO_EC_UPDATE=y +CONFIG_IFDTOOL_DISABLE_ME=y +CONFIG_HAVE_ME_BIN=y +CONFIG_INTEL_ME_DISABLED_HAP=y +CONFIG_BOOTSPLASH=y +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +# CONFIG_TPM_HASH_SHA1 is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-novacustom-v540tu.config_defconfig b/config/coreboot-novacustom-v540tu.config_defconfig new file mode 100644 index 000000000..efa17cdd4 --- /dev/null +++ b/config/coreboot-novacustom-v540tu.config_defconfig @@ -0,0 +1,38 @@ +CONFIG_LOCALVERSION="v1.0.1" +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 +CONFIG_VENDOR_NOVACUSTOM=y +CONFIG_MAINBOARD_VENDOR="Clevo" +CONFIG_CBFS_SIZE=0x1000000 +# CONFIG_CONSOLE_SERIAL is not set +# CONFIG_POST_IO is not set +# CONFIG_CONSOLE_POST is not set +CONFIG_FSP_FD_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Fsp.fd" +CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_NOVACUSTOM_V540TU=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Include" +CONFIG_SOFTWARE_CONNECTION_MANAGER=y +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_EC_DASHARO_EC_UPDATE=y +CONFIG_IFDTOOL_DISABLE_ME=y +CONFIG_HAVE_ME_BIN=y +CONFIG_INTEL_ME_DISABLED_HAP=y +CONFIG_BOOTSPLASH=y +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_FULL_FD=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-novacustom-v560tu.config_defconfig b/config/coreboot-novacustom-v560tu.config_defconfig new file mode 100644 index 000000000..c9b16803c --- /dev/null +++ b/config/coreboot-novacustom-v560tu.config_defconfig @@ -0,0 +1,38 @@ +CONFIG_LOCALVERSION="v1.0.1" +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 +CONFIG_VENDOR_NOVACUSTOM=y +CONFIG_MAINBOARD_VENDOR="Clevo" +CONFIG_CBFS_SIZE=0x1000000 +# CONFIG_CONSOLE_SERIAL is not set +# CONFIG_POST_IO is not set +# CONFIG_CONSOLE_POST is not set +CONFIG_FSP_FD_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Fsp.fd" +CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_NOVACUSTOM_V560TU=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/ArrowLakeFspBinPkg/IoT/ArrowLakeUH/Include" +CONFIG_SOFTWARE_CONNECTION_MANAGER=y +CONFIG_ENABLE_EARLY_DMA_PROTECTION=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_VALIDATE_INTEL_DESCRIPTOR=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_EC_DASHARO_EC_UPDATE=y +CONFIG_IFDTOOL_DISABLE_ME=y +CONFIG_HAVE_ME_BIN=y +CONFIG_INTEL_ME_DISABLED_HAP=y +CONFIG_BOOTSPLASH=y +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_FULL_FD=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-optiplex-7019_9010-maximized.config_defconfig b/config/coreboot-optiplex-7019_9010-maximized.config_defconfig new file mode 100644 index 000000000..cd6362cb3 --- /dev/null +++ b/config/coreboot-optiplex-7019_9010-maximized.config_defconfig @@ -0,0 +1,30 @@ +CONFIG_TIMESTAMPS_ON_CONSOLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_DELL=y +CONFIG_CBFS_SIZE=0xBDF000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_BOARD_DELL_OPTIPLEX_9010=y +CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y +CONFIG_SMSC_SCH5545_EC_FW_FILE="@BLOB_DIR@/xx30/sch5545_ecfw.bin" +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/optiplex_9010/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx30/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx30/gbe.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-optiplex-7019_9010_TXT-maximized.config_defconfig b/config/coreboot-optiplex-7019_9010_TXT-maximized.config_defconfig new file mode 100644 index 000000000..a625c601e --- /dev/null +++ b/config/coreboot-optiplex-7019_9010_TXT-maximized.config_defconfig @@ -0,0 +1,33 @@ +CONFIG_TIMESTAMPS_ON_CONSOLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_DELL=y +CONFIG_CBFS_SIZE=0xBDF000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_BOARD_DELL_OPTIPLEX_9010=y +CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y +CONFIG_SMSC_SCH5545_EC_FW_FILE="@BLOB_DIR@/xx30/sch5545_ecfw.bin" +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/optiplex_9010/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx30/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx30/gbe.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_INTEL_TXT=y +CONFIG_INTEL_TXT_BIOSACM_FILE="@BLOB_DIR@/xx30/IVB_BIOSAC_PRODUCTION.bin" +CONFIG_INTEL_TXT_SINITACM_FILE="@BLOB_DIR@/xx30/SNB_IVB_SINIT_20190708_PW.bin" +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-qemu-tpm1-prod.config_defconfig b/config/coreboot-qemu-tpm1-prod.config_defconfig new file mode 100644 index 000000000..e5d69459a --- /dev/null +++ b/config/coreboot-qemu-tpm1-prod.config_defconfig @@ -0,0 +1,22 @@ +CONFIG_CCACHE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_CBFS_SIZE=0x980000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="console=ttyS0,115200 console=tty quiet loglevel=2" +CONFIG_COREBOOT_ROMSIZE_KB_10240=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DRIVERS_EMULATION_QEMU_XRES=1024 +CONFIG_DRIVERS_EMULATION_QEMU_YRES=768 +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_TPM1=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-qemu-tpm1.config_defconfig b/config/coreboot-qemu-tpm1.config_defconfig new file mode 100644 index 000000000..1d86befa7 --- /dev/null +++ b/config/coreboot-qemu-tpm1.config_defconfig @@ -0,0 +1,23 @@ +CONFIG_CCACHE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_CBFS_SIZE=0x980000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="debug console=ttyS0,115200 console=tty" +CONFIG_COREBOOT_ROMSIZE_KB_10240=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DRIVERS_EMULATION_QEMU_XRES=1024 +CONFIG_DRIVERS_EMULATION_QEMU_YRES=768 +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_TPM1=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-qemu-tpm2-prod.config_defconfig b/config/coreboot-qemu-tpm2-prod.config_defconfig new file mode 100644 index 000000000..fa05e3088 --- /dev/null +++ b/config/coreboot-qemu-tpm2-prod.config_defconfig @@ -0,0 +1,23 @@ +CONFIG_CCACHE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_CBFS_SIZE=0xfe0000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="console=ttyS0,115200 console=tty quiet loglevel=2" +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DRIVERS_EMULATION_QEMU_XRES=1024 +CONFIG_DRIVERS_EMULATION_QEMU_YRES=768 +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_TPM2=y +CONFIG_TPM_LOG_CB=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-qemu-tpm2.config_defconfig b/config/coreboot-qemu-tpm2.config_defconfig new file mode 100644 index 000000000..68d977907 --- /dev/null +++ b/config/coreboot-qemu-tpm2.config_defconfig @@ -0,0 +1,23 @@ +CONFIG_CCACHE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_CBFS_SIZE=0xfe0000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="debug console=ttyS0,115200 console=tty" +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DRIVERS_EMULATION_QEMU_XRES=1024 +CONFIG_DRIVERS_EMULATION_QEMU_YRES=768 +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_TPM2=y +CONFIG_TPM_LOG_CB=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-t420-maximized.config_defconfig b/config/coreboot-t420-maximized.config_defconfig new file mode 100644 index 000000000..4832da6fc --- /dev/null +++ b/config/coreboot-t420-maximized.config_defconfig @@ -0,0 +1,28 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_STATIC_OPTION_TABLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0x7E7FFF +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx20/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx20/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx20/gbe.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_T420=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-t430-maximized.config_defconfig b/config/coreboot-t430-maximized.config_defconfig new file mode 100644 index 000000000..34a7a66ef --- /dev/null +++ b/config/coreboot-t430-maximized.config_defconfig @@ -0,0 +1,28 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_STATIC_OPTION_TABLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0xBDF000 +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx30/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx30/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx30/gbe.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_THINKPAD_T430=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-t440p.config_defconfig b/config/coreboot-t440p.config_defconfig new file mode 100644 index 000000000..4de7f48f6 --- /dev/null +++ b/config/coreboot-t440p.config_defconfig @@ -0,0 +1,25 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0xBDF000 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/t440p/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/t440p/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/t440p/gbe.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_USE_NATIVE_RAMINIT=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-t480-maximized.config_defconfig b/config/coreboot-t480-maximized.config_defconfig new file mode 100644 index 000000000..8127754d9 --- /dev/null +++ b/config/coreboot-t480-maximized.config_defconfig @@ -0,0 +1,28 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx80/t480_ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx80/t480_me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx80/t480_gbe.bin" +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_T480=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_PCIEXP_HOTPLUG=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-t480s-maximized.config_defconfig b/config/coreboot-t480s-maximized.config_defconfig new file mode 100644 index 000000000..7683798da --- /dev/null +++ b/config/coreboot-t480s-maximized.config_defconfig @@ -0,0 +1,29 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=90 +CONFIG_VENDOR_LENOVO=y +CONFIG_MAINBOARD_PART_NUMBER="T480S" +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx80/t480s_ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx80/t480s_me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx80/t480s_gbe.bin" +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_T480S=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y +CONFIG_PCIEXP_HOTPLUG=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-t530-maximized.config_defconfig b/config/coreboot-t530-maximized.config_defconfig new file mode 100644 index 000000000..1e0ee8a99 --- /dev/null +++ b/config/coreboot-t530-maximized.config_defconfig @@ -0,0 +1,31 @@ +CONFIG_TIMESTAMPS_ON_CONSOLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0xBDF000 +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx30/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx30/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx30/gbe.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_T530=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +# CONFIG_RAMINIT_ENABLE_ECC is not set +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_PCI_ALLOW_BUS_MASTER is not set +CONFIG_PCIEXP_HOTPLUG_IO=0x2000 +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-talos-2.config_defconfig b/config/coreboot-talos-2.config_defconfig new file mode 100644 index 000000000..c7dfda850 --- /dev/null +++ b/config/coreboot-talos-2.config_defconfig @@ -0,0 +1,10 @@ +CONFIG_LOCALVERSION="0.7.0" +CONFIG_VENDOR_RAPTOR_CS=y +CONFIG_MAX_CPUS=2 +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_DRIVER_TPM_I2C_ADDR=0x20 +CONFIG_TALOS_2_INFINEON_TPM_1=y +CONFIG_UART_PCI_ADDR=0x0 +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_TPM_LOG_TPM2=y +CONFIG_PAYLOAD_SKIBOOT=y diff --git a/config/coreboot-w530-maximized.config_defconfig b/config/coreboot-w530-maximized.config_defconfig new file mode 100644 index 000000000..5a227731d --- /dev/null +++ b/config/coreboot-w530-maximized.config_defconfig @@ -0,0 +1,28 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_STATIC_OPTION_TABLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0xBDF000 +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx30/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx30/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx30/gbe.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_W530=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-w541.config_defconfig b/config/coreboot-w541.config_defconfig new file mode 100644 index 000000000..abd32c67a --- /dev/null +++ b/config/coreboot-w541.config_defconfig @@ -0,0 +1,26 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0xBDF000 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/w541/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/w541/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/w541/gbe.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_THINKPAD_W541=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +CONFIG_USE_NATIVE_RAMINIT=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-x220-maximized.config_defconfig b/config/coreboot-x220-maximized.config_defconfig new file mode 100644 index 000000000..9562d3cf3 --- /dev/null +++ b/config/coreboot-x220-maximized.config_defconfig @@ -0,0 +1,26 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0x7E7FFF +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx20/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx20/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx20/gbe.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_X220=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-x230-maximized-fhd_edp.config_defconfig b/config/coreboot-x230-maximized-fhd_edp.config_defconfig new file mode 100644 index 000000000..20824606c --- /dev/null +++ b/config/coreboot-x230-maximized-fhd_edp.config_defconfig @@ -0,0 +1,28 @@ +CONFIG_TIMESTAMPS_ON_CONSOLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0xBDF000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx30/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx30/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx30/gbe.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_X230_EDP=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-x230-maximized.config_defconfig b/config/coreboot-x230-maximized.config_defconfig new file mode 100644 index 000000000..e8c01fdaf --- /dev/null +++ b/config/coreboot-x230-maximized.config_defconfig @@ -0,0 +1,31 @@ +CONFIG_TIMESTAMPS_ON_CONSOLE=y +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0xBDF000 +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx30/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/xx30/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx30/gbe.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_X230=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" +# CONFIG_RAMINIT_ENABLE_ECC is not set +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +# CONFIG_PCI_ALLOW_BUS_MASTER is not set +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/config/coreboot-z220-cmt.config_defconfig b/config/coreboot-z220-cmt.config_defconfig new file mode 100644 index 000000000..e265c2b93 --- /dev/null +++ b/config/coreboot-z220-cmt.config_defconfig @@ -0,0 +1,35 @@ +CONFIG_BOOTSPLASH_IMAGE=y +CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" +CONFIG_BOOTSPLASH_CONVERT=y +CONFIG_BOOTSPLASH_CONVERT_QUALITY=70 +CONFIG_VENDOR_HP=y +CONFIG_CBFS_SIZE=0xFE4FFF +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Hewlett-Packard" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Hewlett-Packard Z220 CMT Workstation" +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="@BLOB_DIR@/z220/ifd.bin" +CONFIG_ME_BIN_PATH="@BLOB_DIR@/z220/me.bin" +CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xx30/gbe.bin" +CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=63 +CONFIG_BOARD_HP_Z220_CMT_WORKSTATION=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_TPM_MEASURED_BOOT=y +CONFIG_LINUX_COMMAND_LINE="nohz=off quiet loglevel=2" +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_BOOTSPLASH=y +CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y +CONFIG_PCIEXP_HOTPLUG_IO=0x2000 +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_DRIVERS_MTK_WIFI is not set +CONFIG_TPM_LOG_CB=y +CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y +CONFIG_PAYLOAD_LINUX=y +CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" +CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" diff --git a/modules/coreboot b/modules/coreboot index f9f07c1ec..dede4468f 100644 --- a/modules/coreboot +++ b/modules/coreboot @@ -330,6 +330,15 @@ coreboot.save_in_oldconfig_format_in_place: olddefconfig \ && mv "$(build)/$(coreboot_dir)/.config" "$(pwd)/$(CONFIG_COREBOOT_CONFIG)" +coreboot.save_in_defconfig_format_backup: + mkdir -p "$(build)/$(coreboot_dir)" && \ + cp "$(pwd)/$(CONFIG_COREBOOT_CONFIG)" "$(build)/$(coreboot_dir)/.config" && \ + $(MAKE) \ + -C "$(build)/$(coreboot_base_dir)" \ + DOTCONFIG="$(build)/$(coreboot_dir)/.config" \ + savedefconfig && \ + cp "$(build)/$(coreboot_base_dir)/defconfig" "$(pwd)/$(CONFIG_COREBOOT_CONFIG)_defconfig" + coreboot.modify_defconfig_in_place: mkdir -p "$(build)/$(coreboot_dir)" && \ cp "$(pwd)/$(CONFIG_COREBOOT_CONFIG)" "$(build)/$(coreboot_dir)/.config" && \ From 27570a16424c77cd37a2da78d36cde9cc8870613 Mon Sep 17 00:00:00 2001 From: Insurgo Date: Wed, 15 Apr 2026 15:57:53 -0400 Subject: [PATCH 23/25] config/coreboot-nitropad-ns50: account for FSP header path change from Dasharo/mtl_release Command trail: ./docker_repro.sh make BOARD=UNTESTED_nitropad-ns50 coreboot.save_in_oldconfig_format_in_place ./docker_repro.sh make BOARD=UNTESTED_nitropad-ns50 coreboot.save_in_defconfig_format_backup git difftool -d sudo cp config/coreboot-nitropad-ns50.config_defconfig config/coreboot-nitropad-ns50.config ./docker_repro.sh make BOARD=UNTESTED_nitropad-ns50 coreboot.save_in_oldconfig_format_in_place ./docker_repro.sh make BOARD=UNTESTED_nitropad-ns50 coreboot.save_in_defconfig_format_backup Preserve smbios strings from origin/master while reducing unnecessary defconfig changes to only critical deviations: - Use RaptorLake FSP headers (MTL release) - Set CONFIG_USE_PC_CMOS_ALTCENTURY=n - Enable console loglevel/ansi prefixes - Fix debug output: HWBASE_DEBUG_NULL -> HWBASE_DEBUG_CB Signed-off-by: Thierry Laurion --- config/coreboot-nitropad-ns50.config | 14 +++++++------- config/coreboot-nitropad-ns50.config_defconfig | 5 ++--- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/config/coreboot-nitropad-ns50.config b/config/coreboot-nitropad-ns50.config index c76d2ed4d..cac4b553c 100644 --- a/config/coreboot-nitropad-ns50.config +++ b/config/coreboot-nitropad-ns50.config @@ -16,9 +16,8 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -# CONFIG_OPTION_BACKEND_NONE is not set -CONFIG_USE_OPTION_TABLE=y -# CONFIG_STATIC_OPTION_TABLE is not set +CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_OPTION_TABLE is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -302,7 +301,7 @@ CONFIG_SOC_INTEL_UART_DEV_MAX=7 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff CONFIG_FSP_TYPE_IOT=y -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/Include/" CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 CONFIG_DATA_BUS_WIDTH=128 CONFIG_DIMMS_PER_CHANNEL=2 @@ -452,8 +451,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y -# CONFIG_FIRMWARE_CONNECTION_MANAGER is not set -CONFIG_SOFTWARE_CONNECTION_MANAGER=y +CONFIG_FIRMWARE_CONNECTION_MANAGER=y +# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y CONFIG_ENABLE_EARLY_DMA_PROTECTION=y CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y @@ -542,7 +541,8 @@ CONFIG_RCBA_LENGTH=0x4000 # CONFIG_EC_ACPI=y CONFIG_EC_DASHARO_EC=y -# CONFIG_EC_DASHARO_EC_UPDATE is not set +CONFIG_EC_DASHARO_EC_UPDATE=y +CONFIG_EC_DASHARO_EC_UPDATE_FILE="ec.rom" # # Intel Firmware diff --git a/config/coreboot-nitropad-ns50.config_defconfig b/config/coreboot-nitropad-ns50.config_defconfig index f51f45582..04b8fdfe3 100644 --- a/config/coreboot-nitropad-ns50.config_defconfig +++ b/config/coreboot-nitropad-ns50.config_defconfig @@ -1,5 +1,4 @@ CONFIG_LOCALVERSION="v1.8.0" -CONFIG_USE_OPTION_TABLE=y CONFIG_BOOTSPLASH_IMAGE=y CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg" CONFIG_BOOTSPLASH_CONVERT=y @@ -18,17 +17,17 @@ CONFIG_HAVE_IFD_BIN=y CONFIG_TPM_MEASURED_BOOT=y CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2" CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" -CONFIG_SOFTWARE_CONNECTION_MANAGER=y CONFIG_ENABLE_EARLY_DMA_PROTECTION=y CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y CONFIG_VALIDATE_INTEL_DESCRIPTOR=y # CONFIG_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_EC_DASHARO_EC_UPDATE=y CONFIG_IFDTOOL_DISABLE_ME=y CONFIG_HAVE_ME_BIN=y CONFIG_INTEL_ME_DISABLED_HAP=y CONFIG_BOOTSPLASH=y # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set # CONFIG_TPM_HASH_SHA1 is not set CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y CONFIG_PAYLOAD_LINUX=y From 88418f4d94eb301ae8b6aef0d9d23cd283274266 Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Thu, 16 Apr 2026 14:36:09 -0400 Subject: [PATCH 24/25] modules/coreboot: purism fork builds its own toolchain Previously coreboot-purism depended on coreboot-24.02.01's toolchain to avoid duplicate toolchain builds. However, no maintained boards actually use 24.02.01 directly (only unmaintained x230-legacy boards), so this dependency was unnecessary complexity. Now coreboot-purism builds its complete toolchain independently, making it consistent with all other coreboot forks (Dasharo variants, talos_2) which also build their own toolchains. This simplifies the cache strategy: each fork's cache contains only its own coreboot directory, with no hidden dependencies. Signed-off-by: Thierry Laurion --- modules/coreboot | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/modules/coreboot b/modules/coreboot index dede4468f..2779ff4ed 100644 --- a/modules/coreboot +++ b/modules/coreboot @@ -94,10 +94,10 @@ coreboot-talos_2_repo := https://github.com/Dasharo/coreboot coreboot-talos_2_commit_hash := fc47236e9877f4113dfcce07fa928f52d4d2c8ee $(eval $(call coreboot_module,talos_2,)) -# coreboot-purism is based on 24.02.01 - reuse that toolchain. +# coreboot-purism: builds its own complete toolchain (no dependency on 24.02.01) coreboot-purism_repo := https://source.puri.sm/firmware/coreboot.git coreboot-purism_commit_hash := bea9947a1279be7d4a72b38a601d0288d10d1cb8 -$(eval $(call coreboot_module,purism,24.02.01)) +$(eval $(call coreboot_module,purism,)) # Dasharo forks - based on various coreboot upstream releases # IMPORTANT: Dasharo forks CANNOT share toolchains with upstream coreboot releases From c305965180e2306742a4a6813252bfa1d27b000c Mon Sep 17 00:00:00 2001 From: Thierry Laurion Date: Thu, 16 Apr 2026 14:36:23 -0400 Subject: [PATCH 25/25] circleci: restructure pipeline to fix fan-in and reduce io/network cost Problem: fan-in = multiple upstream jobs persist same paths to workspace. Origin/master had massive IO/network cost from rebuilding everything. Thanks CircleCI free tier for open source projects! Mitigation for https://circleci.canny.io/cloud-feature-requests/p/support-wildcards-in-savecachepaths Changes vs origin/master: - Add 'heads-docker' executor (centralized docker config, image v0.2.9) - Add glossary explaining fan-in, workspace chain, cache layers - Split build_and_persist into separate jobs per stage: build (parallel board builds), x86_coreboot (per fork), x86_musl_cross_make, x86_blobs, x86_save_modules_cache, ppc64_talos_2 - Add create_hashes job (creates cache hashes, shared by all arches) - Replace save_cache with per-job cache saving (eliminates fan-in) - Each job saves cache immediately before persisting to workspace - x86 chain: create_hashes -> x86_blobs -> x86_musl_cross_make -> x86_coreboot seeds -> parallel builds + x86_save_modules_cache - ppc64 chain: create_hashes -> ppc64_talos_2 (linear) - Build: only clean logs dir, not entire board dir (performance) - Cache hierarchy: modules > coreboot+musl > musl > blobs (x86 only, workspace) - Fix ppc64 target: 'UNTESTED_talos-2' - Add checkout step to all jobs - Rename cache keys: modules-and-patches -> modules - Other: document CI/cache behavior in docs and README Signed-off-by: Thierry Laurion --- .circleci/config.yml | 419 +++++++++++++++++++++++++++---------------- README.md | 20 ++- doc/architecture.md | 2 + doc/circleci.md | 155 ++++++++++++++++ doc/development.md | 11 +- doc/docker.md | 2 +- 6 files changed, 440 insertions(+), 169 deletions(-) create mode 100644 doc/circleci.md diff --git a/.circleci/config.yml b/.circleci/config.yml index 1f0fda868..48469a0a0 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -1,5 +1,13 @@ version: 2.1 +executors: + heads-docker: + docker: + # Docker image: tlaurion/heads-dev-env:v0.2.9 + - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de + resource_class: large + working_directory: ~/heads + commands: build_board: parameters: @@ -46,12 +54,35 @@ commands: path: build/<< parameters.arch >>/<< parameters.target >> jobs: - prep_env: - docker: - # Docker image: tlaurion/heads-dev-env:v0.2.9 - - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de - resource_class: large - working_directory: ~/heads + + # ═══════════════════════════════════════════════════════════════════════════ + # Glossary + # ═══════════════════════════════════════════════════════════════════════════ + # fan-in: When multiple upstream jobs try to persist the same paths to the + # same workspace. CircleCI throws an error if this happens. + # Solution: Each job saves its own cache immediately, before persisting. + # + # workspace chain: Linear dependency chain where only one job persists at a time. + # No fan-in possible since each job in the chain is unique. + # + # cache layer: CircleCI caches are hierarchical for each architecture: + # - modules (full, includes everything below) + # - coreboot+musl (includes musl) + # - musl (base toolchain, rarely changes) + # Caches are reused across pipelines for the same repository. + # They do NOT speed up sibling jobs in the same workflow run. + # Blobs (downloaded binaries) are NOT cached via save_cache; instead they are + # persisted to workspace for downstream jobs. x86_blobs caches the blobs directory + # for future x86 builds, but ppc64 has no blobs dependency. + # ═══════════════════════════════════════════════════════════════════════════ + + # create_hashes: creates all cache hash files for the pipeline + # - Checks out code, resets to CIRCLE_SHA1 + # - Creates hashes for: modules, coreboot, musl-cross-make, blobs listing + # - Persists tmpDir to workspace for downstream jobs + # This job is fast and shared by all architectures. + create_hashes: + executor: heads-docker steps: - checkout - run: @@ -74,21 +105,32 @@ jobs: name: Creating musl-cross-make and musl-cross-make patches digest (musl-cross-make cache digest) command: | find ./flake.lock modules/musl-cross-make* -type f | sort -h | xargs sha256sum > ./tmpDir/musl-cross-make.sha256sums + - run: + name: Creating blobs listing digest (for x86_blobs cache key) + command: | + find ./blobs -type f -name "*.sh" | sort -h | xargs sha256sum > ./tmpDir/blobs_listing.sha256sums + - persist_to_workspace: + root: ~/heads + paths: + - tmpDir + + # x86_blobs: downloads x86-specific blobs (ME, GBE, etc.) + # - Checks out code to get blob download scripts + # - Attaches workspace from create_hashes (has tmpDir with hashes) + # - Restores blob cache (keyed on blob listing hash) + # - Downloads blobs if cache missed + # - Saves blob cache for future runs + # - Persists blobs to workspace for downstream jobs + # Only needed for x86 boards (ppc64 UNTESTED_talos-2 has no blobs) + x86_blobs: + executor: heads-docker + steps: + - checkout + - attach_workspace: + at: ~/heads - restore_cache: - # First matched/found key wins and following keys are not tried keys: - # Cache for matching modules digest, validated to be exactly the same as in GitHub current commit. - # This cache was made on top of below caches, if previously existing. - # If no module definition changed, we reuse this one - # x86 caches - - nix-docker-heads-modules-x86-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} - - nix-docker-heads-coreboot-musl-cross-make-x86-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} - - nix-docker-heads-musl-cross-make-x86-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} - # Cache for coreboot module (and patches) and musl-cross-make digests (coreboot: triannual release) - # ppc64 caches - - nix-docker-heads-modules-ppc64-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} - - nix-docker-heads-coreboot-musl-cross-make-ppc64-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} - - nix-docker-heads-musl-cross-make-ppc64-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - nix-docker-heads-blobs-x86-{{ checksum "./tmpDir/blobs_listing.sha256sums" }}{{ .Environment.CACHE_VERSION }} - run: name: Download and neuter xx20 ME (keep generated GBE and extracted IFD in tree) command: | @@ -119,17 +161,17 @@ jobs: echo skipping for now exit 0 ./blobs/xx30/vbios_w530.sh + - save_cache: + key: nix-docker-heads-blobs-x86-{{ checksum "./tmpDir/blobs_listing.sha256sums" }}{{ .Environment.CACHE_VERSION }} + paths: + - blobs - persist_to_workspace: root: ~/heads paths: - - . + - blobs - build_and_persist: - docker: - # Docker image: tlaurion/heads-dev-env:v0.2.9 - - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de - resource_class: large - working_directory: ~/heads + build: + executor: heads-docker parameters: arch: type: string @@ -139,77 +181,133 @@ jobs: subcommand: type: string steps: + - checkout - attach_workspace: at: ~/heads - build_board: - arch: << parameters.arch >> + arch: <> + target: <> + subcommand: <> + + # x86_musl_cross_make: builds musl-cross-make for x86 architecture. + # - Checks out code for build scripts + # - Attaches workspace from x86_blobs (has blobs) + # - Restores musl-cross-make cache from previous builds + # - Builds musl-cross-make toolchain + # - Persists packages/x86, build/x86, crossgcc/x86, install/x86 to workspace + # - Saves musl-cross-make cache for future runs + # Workspace chain: create_hashes -> x86_blobs -> x86_musl_cross_make -> x86_coreboot + x86_musl_cross_make: + executor: heads-docker + parameters: + target: + type: string + subcommand: + type: string + steps: + - checkout + - attach_workspace: + at: ~/heads + - restore_cache: + keys: + - nix-docker-heads-musl-cross-make-x86-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - build_board: + arch: x86 target: << parameters.target >> subcommand: << parameters.subcommand >> - persist_to_workspace: root: ~/heads paths: - - packages/<< parameters.arch >> - - build/<< parameters.arch >> - - crossgcc/<< parameters.arch >> - - install/<< parameters.arch >> + - packages/x86 + - build/x86 + - crossgcc/x86 + - install/x86 + - save_cache: + key: nix-docker-heads-musl-cross-make-x86-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + paths: + - build/x86/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c + - crossgcc/x86 + - packages/x86 - build: - docker: - # Docker image: tlaurion/heads-dev-env:v0.2.9 - - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de - resource_class: large - working_directory: ~/heads + # x86_coreboot: builds a coreboot fork for x86 architecture. + # - Checks out code for build scripts + # - Attaches workspace from x86_musl_cross_make (has blobs + musl) + # - Restores coreboot+toolchain cache with fallbacks (fork-specific -> generic -> musl -> modules) + # - Builds coreboot firmware for this fork + # - Persists packages/x86, build/x86, crossgcc/x86, install/x86 to workspace + # - Saves fork-specific coreboot+toolchain cache + # - Optionally saves full modules cache (only on one fork) + # This is kept as an escape hatch, but enabling it on the seed job would + # extend that job's runtime and delay all downstream jobs that require it. + # Each distinct coreboot fork uses this: dasharo_nv4x, dasharo_v56, purism, 25.09, 4.11, dasharo_msi_*, etc. + # Workspace chain: create_hashes -> x86_blobs -> x86_musl_cross_make -> x86_coreboot + x86_coreboot: + executor: heads-docker parameters: - arch: - type: string - default: x86 target: type: string subcommand: type: string + coreboot_dir: + type: string + description: "The build/x86/coreboot-* directory built by this fork (e.g. coreboot-24.02.01)" + save_full_modules_cache: + type: boolean + default: false + description: "Set true only on the last coreboot fork in sequence to save the full modules cache" steps: + - checkout - attach_workspace: at: ~/heads + - restore_cache: + keys: + - nix-docker-heads-coreboot-musl-cross-make-x86-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }}-<< parameters.coreboot_dir >> + - nix-docker-heads-coreboot-musl-cross-make-x86-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - nix-docker-heads-musl-cross-make-x86-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - nix-docker-heads-modules-x86-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} - build_board: - arch: <> - target: <> - subcommand: <> - - save_cache_x86: - docker: - # Docker image: tlaurion/heads-dev-env:v0.2.9 - - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de - resource_class: large - working_directory: ~/heads - steps: - - attach_workspace: - at: ~/heads - - save_cache: - # Generate cache for the same musl-cross-make module definition if hash is not previously existing - # CircleCI removed their wildcard support, so we have to list precise versions to cache in directory names - key: nix-docker-heads-musl-cross-make-x86-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + arch: x86 + target: << parameters.target >> + subcommand: << parameters.subcommand >> + - persist_to_workspace: + root: ~/heads paths: - - build/x86/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c - - crossgcc/x86 - packages/x86 + - build/x86 + - crossgcc/x86 + - install/x86 - save_cache: - # Generate cache for the same coreboot and musl-cross-make modules definition if hash is not previously existing - # CircleCI removed their wildcard support, so we have to list precise versions to cache in directory names - key: nix-docker-heads-coreboot-musl-cross-make-x86-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + key: nix-docker-heads-coreboot-musl-cross-make-x86-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }}-<< parameters.coreboot_dir >> paths: - - build/x86/coreboot-4.11 - - build/x86/coreboot-24.02.01 - - build/x86/coreboot-25.09 - - build/x86/coreboot-dasharo_v56 - - build/x86/coreboot-dasharo_nv4x - - build/x86/coreboot-dasharo_msi_z790 - - build/x86/coreboot-dasharo_msi_z690 - - build/x86/coreboot-purism + - build/x86/<< parameters.coreboot_dir >> - build/x86/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c - crossgcc/x86 - packages/x86 + - when: + condition: << parameters.save_full_modules_cache >> + steps: + - save_cache: + key: nix-docker-heads-modules-x86-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} + paths: + - build/x86 + - install/x86 + - crossgcc/x86 + - packages/x86 + + # x86_save_modules_cache: saves the full x86 modules cache from the seed workspace. + # - Attaches workspace from the 25.09 seed job EOL_t480-hotp-maximized + # (workspace already has blobs + musl + coreboot + persisted x86 outputs) + # - Saves full modules cache (build/x86, install/x86, crossgcc/x86, packages/x86) + # - Does NOT build another board, so cache publication runs in parallel without + # extending the critical path for 25.09 board builds. + # - This cache helps future pipelines only; current workflow siblings consume + # the workspace produced by EOL_t480-hotp-maximized, not this cache. + x86_save_modules_cache: + executor: heads-docker + steps: + - attach_workspace: + at: ~/heads - save_cache: - # Generate cache for the exact same modules definitions if hash is not previously existing key: nix-docker-heads-modules-x86-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} paths: - build/x86 @@ -217,28 +315,47 @@ jobs: - crossgcc/x86 - packages/x86 - - - save_cache_ppc64: - docker: - # Docker image: tlaurion/heads-dev-env:v0.2.9 - - image: tlaurion/heads-dev-env@sha256:96f8f91c6464305c4a990d59f9ef93910c16c7fd0501a46b43b34a4600a368de - resource_class: large - working_directory: ~/heads + # ppc64_talos_2: builds UNTESTED_talos-2 board for ppc64 architecture (coreboot version: talos_2). + # - Checks out code for build scripts + # - Attaches workspace from create_hashes (has tmpDir with hashes) + # - Restores ppc64 musl-cross-make cache + # - Builds musl-cross-make + coreboot + firmware together (ppc64 has only one board) + # - Persists packages/ppc64, build/ppc64, crossgcc/ppc64, install/ppc64 to workspace + # - Saves all 3 cache layers: musl, coreboot, modules + # Workspace chain: create_hashes -> ppc64_talos_2 (linear, no fan-in since only one board) + ppc64_talos_2: + executor: heads-docker + parameters: + target: + type: string + subcommand: + type: string steps: + - checkout - attach_workspace: at: ~/heads + - restore_cache: + keys: + - nix-docker-heads-musl-cross-make-ppc64-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - nix-docker-heads-modules-ppc64-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} + - build_board: + arch: ppc64 + target: << parameters.target >> + subcommand: << parameters.subcommand >> + - persist_to_workspace: + root: ~/heads + paths: + - packages/ppc64 + - build/ppc64 + - crossgcc/ppc64 + - install/ppc64 - save_cache: - # Generate cache for the same musl-cross-make module definition if hash is not previously existing - # CircleCI removed their wildcard support, so we have to list precise versions to cache in directory names key: nix-docker-heads-musl-cross-make-ppc64-{{ checksum "./tmpDir/musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} paths: - build/ppc64/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c - crossgcc/ppc64 - packages/ppc64 - save_cache: - # Generate cache for the same coreboot and musl-cross-make modules definition if hash is not previously existing - # CircleCI removed their wildcard support, so we have to list precise versions to cache in directory names key: nix-docker-heads-coreboot-musl-cross-make-ppc64-{{ checksum "./tmpDir/coreboot_musl-cross-make.sha256sums" }}{{ .Environment.CACHE_VERSION }} paths: - build/ppc64/coreboot-talos_2 @@ -246,7 +363,6 @@ jobs: - crossgcc/ppc64 - packages/ppc64 - save_cache: - # Generate cache for the exact same modules definitions if hash is not previously existing key: nix-docker-heads-modules-ppc64-{{ checksum "./tmpDir/all_modules_and_patches.sha256sums" }}{{ .Environment.CACHE_VERSION }} paths: - build/ppc64 @@ -259,100 +375,99 @@ workflows: build_and_test: max_auto_reruns: 3 jobs: - - prep_env + - create_hashes - # This step builds musl-cross-make for x86 architecture, which will be used by subsequent x86 board builds - - build_and_persist: - name: x86-musl-cross-make - target: EOL_t480-hotp-maximized - subcommand: "musl-cross-make" + # ── x86 blobs ─────────────────────────────────────────────────────── + # Chain: create_hashes -> x86_blobs -> x86_musl_cross_make -> x86_coreboot + - x86_blobs: requires: - - prep_env + - create_hashes - # This step builds musl-cross-make for ppc64 architecture, which will be used by subsequent ppc64 board builds - - build_and_persist: - name: ppc64-musl-cross-make - arch: ppc64 + # ── ppc64 talos-2 ────────────────────────────────────────────────── + # Chain: create_hashes -> ppc64_talos_2 (no fan-in, only one board) + - ppc64_talos_2: target: UNTESTED_talos-2 + subcommand: "" + requires: + - create_hashes + + # ── x86 musl-cross-make seed ────────────────────────────────────────── + # Chain: x86_blobs -> x86_musl_cross_make -> x86_coreboot seeds + - x86_musl_cross_make: + name: x86-musl-cross-make + target: EOL_t480-hotp-maximized subcommand: "musl-cross-make" requires: - - prep_env + - x86_blobs - # Below, sequentially build one board for each coreboot version. - # The last board in the sequence is the dependency for the parallel boards built at the end, and also save_cache. + # ── x86 coreboot fork seeds ─────────────────────────────────────────── + # Chain: x86_musl_cross_make -> x86_coreboot (linear per fork) + # Each seed builds its coreboot fork and saves fork-specific cache. + # No fan-in -> no workspace collision. - # coreboot 24.02.01 - - build_and_persist: + # dasharo_nv4x fork + - x86_coreboot: name: novacustom-nv4x_adl target: novacustom-nv4x_adl subcommand: "" + coreboot_dir: coreboot-dasharo_nv4x + requires: + - x86-musl-cross-make + + # dasharo_v56 fork + - x86_coreboot: + name: novacustom-v560tu + target: novacustom-v560tu + subcommand: "" + coreboot_dir: coreboot-dasharo_v56 requires: - x86-musl-cross-make - # coreboot purism: builds 24.02.01 toolchain, all librem boards share it - - build_and_persist: + # purism fork + - x86_coreboot: name: librem_14 target: librem_14 subcommand: "" + coreboot_dir: coreboot-purism requires: - x86-musl-cross-make - # t480 is based on 25.09 coreboot release, not sharing any buildstack from now, depend on muscl-cross cache - - build_and_persist: + # 25.09 fork + # Seed workspace for downstream 25.09 boards and x86_save_modules_cache. + - x86_coreboot: name: EOL_t480-hotp-maximized target: EOL_t480-hotp-maximized subcommand: "" + coreboot_dir: coreboot-25.09 requires: - x86-musl-cross-make - # coreboot talos_2 - - build_and_persist: - name: UNTESTED_talos-2 - arch: ppc64 - target: UNTESTED_talos-2 - subcommand: "" - requires: - - ppc64-musl-cross-make - - # coreboot 4.11 - - build_and_persist: + # 4.11 fork + - x86_coreboot: name: EOL_librem_l1um target: EOL_librem_l1um subcommand: "" + coreboot_dir: coreboot-4.11 requires: - x86-musl-cross-make - # dasharo_msi: builds its own toolchain, msi_z690a_ddr5 depends on it - - build_and_persist: + # dasharo_msi_z690 fork + - x86_coreboot: name: UNTESTED_msi_z690a_ddr4 target: UNTESTED_msi_z690a_ddr4 subcommand: "" + coreboot_dir: coreboot-dasharo_msi_z690 requires: - x86-musl-cross-make - # Dasharo forks: each fork builds its own toolchain (FSP header incompatibilities) - # - novacustom-nv4x_adl: builds dasharo_nv4x toolchain, nitropad-ns50 reuses it - # - novacustom-v560tu: builds dasharo_v56 toolchain, v540tu reuses it - # - UNTESTED_msi_z690a_ddr4: builds dasharo_msi_z690 toolchain, msi_z690a_ddr5 reuses it - # - UNTESTED_msi_z790p_ddr4: builds dasharo_msi_z790 toolchain, msi_z790p_ddr5 reuses it - - # x86: combines x86 workspaces and saves x86 cache - # Workspaces combined: x86-musl-cross-make, novacustom-nv4x_adl, librem_14, - # EOL_t480-hotp-maximized, EOL_librem_l1um, UNTESTED_msi_z690a_ddr4 - - save_cache_x86: + # dasharo_msi_z790 fork + - x86_coreboot: + name: UNTESTED_msi_z790p_ddr4 + target: UNTESTED_msi_z790p_ddr4 + subcommand: "" + coreboot_dir: coreboot-dasharo_msi_z790 requires: - x86-musl-cross-make - - novacustom-nv4x_adl - - librem_14 - - EOL_t480-hotp-maximized - - EOL_librem_l1um - - UNTESTED_msi_z690a_ddr4 - - # ppc64: combines ppc64 workspaces and saves ppc64 cache - # Workspaces combined: ppc64-musl-cross-make, UNTESTED_talos-2 - - save_cache_ppc64: - requires: - - UNTESTED_talos-2 # Those onboarding new boards should add their entries below. # coreboot 25.09 boards @@ -426,10 +541,12 @@ workflows: requires: - EOL_t480-hotp-maximized - - build: - name: EOL_x230-hotp-maximized - target: EOL_x230-hotp-maximized - subcommand: "" + # Saves full modules cache from the 25.09 seed workspace. + # Runs in parallel with other 25.09 board builds and does not build x230. + # This publishes cache state for future pipelines without delaying the + # start of sibling jobs that also require EOL_t480-hotp-maximized. + - x86_save_modules_cache: + name: x86_save_modules_cache requires: - EOL_t480-hotp-maximized @@ -538,7 +655,7 @@ workflows: requires: - EOL_t480-hotp-maximized - # librem boards: share purism 24.02.01 toolchain with librem_14 + # librem boards: use coreboot-purism fork (librem_14 builds the fork's toolchain) - build: name: EOL_librem_13v2 target: EOL_librem_13v2 @@ -625,14 +742,6 @@ workflows: requires: - novacustom-nv4x_adl - # NovaCustom v56: builds dasharo_v56 toolchain - - build: - name: novacustom-v560tu - target: novacustom-v560tu - subcommand: "" - requires: - - x86-musl-cross-make - # NovaCustom v56: shares dasharo_v56 toolchain with novacustom-v560tu - build: name: novacustom-v540tu @@ -649,14 +758,6 @@ workflows: requires: - UNTESTED_msi_z690a_ddr4 - # Dasharo msi_z790: builds dasharo_msi_z790 toolchain - - build: - name: UNTESTED_msi_z790p_ddr4 - target: UNTESTED_msi_z790p_ddr4 - subcommand: "" - requires: - - x86-musl-cross-make - # Dasharo msi_z790: shares dasharo_msi_z790 toolchain with UNTESTED_msi_z790p_ddr4 - build: name: msi_z790p_ddr5 diff --git a/README.md b/README.md index 3e3aed8d3..e5e62ffe7 100644 --- a/README.md +++ b/README.md @@ -34,6 +34,7 @@ Heads codebase. Start here: | [doc/ux-patterns.md](doc/ux-patterns.md) | GUI/UX conventions: whiptail wrappers, integrity report, error flows | | [doc/config.md](doc/config.md) | Board and user configuration system | | [doc/docker.md](doc/docker.md) | Reproducible build workflow using Docker | +| [doc/circleci.md](doc/circleci.md) | CircleCI pipeline layout, workspace flow, and cache behavior | | [doc/qemu.md](doc/qemu.md) | QEMU board targets for development and testing | | [doc/wp-notes.md](doc/wp-notes.md) | Flash write-protection status per board | | [doc/BOARDS_AND_TESTERS.md](doc/BOARDS_AND_TESTERS.md) | Supported boards and their maintainers/testers | @@ -65,9 +66,15 @@ provided Docker wrappers — no host-side QEMU or swtpm installation is needed. and QEMU runtime with software TPM (swtpm) and the bundled `canokey-qemu` virtual OpenPGP smartcard. Build and test entirely in software before flashing real hardware. +Build targets are the directory names under `boards/`. For the current set of +tested and maintained targets, see [doc/BOARDS_AND_TESTERS.md](doc/BOARDS_AND_TESTERS.md). + For full details — wrapper scripts, Nix local dev, reproducibility verification, and maintainer workflow — see **[doc/docker.md](doc/docker.md)**. +For CI cache/workspace behavior and the CircleCI job graph, see +**[doc/circleci.md](doc/circleci.md)**. + For QEMU board testing see **[doc/qemu.md](doc/qemu.md)**. For troubleshooting build issues see **[doc/faq.md](doc/faq.md)** and @@ -118,12 +125,13 @@ kernel. * Building coreboot's cross compilers can take a while. Luckily this is only done once. * Builds are finally reproducible! The [reproduciblebuilds tag](https://github.com/osresearch/heads/issues?q=is%3Aopen+is%3Aissue+milestone%3Areproduciblebuilds) tracks any regressions. -* Currently only tested in QEMU, the Thinkpad x230, Librem series and the Chell Chromebook. -** Xen does not work in QEMU. Signing, HOTP, and TOTP do work; see below. -* Building for the Lenovo X220 requires binary blobs to be placed in the blobs/x220/ folder. -See the readme.md file in that folder -* Building for the Librem 13 v2/v3 or Librem 15 v3/v4 requires binary blobs to be placed in -the blobs/librem_skl folder. See the readme.md file in that folder +* Current tested and maintained boards are tracked in [doc/BOARDS_AND_TESTERS.md](doc/BOARDS_AND_TESTERS.md). Board targets themselves live under `boards/`. +* Xen does not work in QEMU. Signing, HOTP, and TOTP do work; see below. +* Blob requirements are board- or board-family-specific. Check the relevant documentation under `blobs/` for the target you are building. +* Purism boards use Purism-managed coreboot blob paths from the Purism fork (for example `3rdparty/purism-blobs/...` via `CONFIG_IFD_BIN_PATH` and `CONFIG_ME_BIN_PATH` in `config/coreboot-librem_*.config`). Heads should not maintain those vendor blob payloads. Runtime firmware notes for Librem blob jail are in [blobs/librem_jail/README](blobs/librem_jail/README). +* Lenovo xx20 boards such as X220 and X230 use the shared xx20 blob flow documented in [blobs/xx20/readme.md](blobs/xx20/readme.md). X220-specific notes are in [blobs/x220/readme.md](blobs/x220/readme.md). +* Other boards can source blobs from board-family directories under `blobs/` (for example xx20/xx30/xx80, t420, t440p, w541) or from fork-specific paths configured in coreboot configs (for example Dasharo boards using `3rdparty/dasharo-blobs/...`). Vendor blob payloads remain maintained by their upstream vendors/forks. +* T480 and T480s blob requirements are documented in [blobs/xx80/README.md](blobs/xx80/README.md). Other families have their own docs under `blobs/`, for example `t420/`, `t440p/`, and `w541/`. ### QEMU diff --git a/doc/architecture.md b/doc/architecture.md index 638d36faf..4b52a5992 100644 --- a/doc/architecture.md +++ b/doc/architecture.md @@ -98,6 +98,8 @@ The top-level `Makefile` orchestrates: - Final ROM image: coreboot ROM with Linux + initrd payload embedded Reproducible builds are achieved via Nix-pinned Docker images. See [docker.md](docker.md). +The CI pipeline's workspace and cache behavior is documented in +[circleci.md](circleci.md). --- diff --git a/doc/circleci.md b/doc/circleci.md new file mode 100644 index 000000000..cb5424540 --- /dev/null +++ b/doc/circleci.md @@ -0,0 +1,155 @@ +# CircleCI Pipeline and Cache Model + +This document explains how the current CircleCI pipeline in Heads is structured, +what the cache layers mean, and why `x86_save_modules_cache` exists as a +separate job. + +See also: [development.md](development.md), [docker.md](docker.md), +[architecture.md](architecture.md). + +--- + +## Goals + +The CircleCI pipeline is optimized for two constraints: + +- Avoid CircleCI workspace fan-in errors. +- Reuse expensive build outputs across pipelines without delaying unrelated + board builds more than necessary. + +The current layout favors a linear x86 seed chain followed by parallel board +builds. + +--- + +## Key concepts + +### Workspace + +A workspace is data passed from an upstream job to downstream jobs in the same +workflow run. + +- Workspaces help sibling jobs in the current pipeline. +- Workspaces are downloaded fresh by downstream jobs. +- Persisting the same paths from multiple upstream jobs into one downstream job + causes fan-in problems in CircleCI. + +### Cache + +A CircleCI cache is stored for reuse by later pipeline runs in the same +repository. + +- Caches help future pipelines. +- Caches do not speed up sibling jobs in the same workflow run. +- Forks do not share caches with the upstream repository. + +This distinction matters for understanding `x86_save_modules_cache`: it is a +cache publication job, not a producer for current sibling board builds. + +--- + +## x86 pipeline shape + +The x86 chain is intentionally linear until a seed board has produced a usable +workspace: + +1. `create_hashes` +2. `x86_blobs` +3. `x86_musl_cross_make` +4. `x86_coreboot` seed jobs, one per coreboot fork +5. Downstream board builds for each fork, in parallel + +For the coreboot 25.09 branch, the seed board is `EOL_t480-hotp-maximized`. +That job produces the workspace used by the other 25.09 boards in the same +workflow. + +--- + +## Cache layers + +The x86 pipeline uses three cache layers plus blob handling: + +1. `musl-cross-make` +2. `coreboot+musl-cross-make` +3. `modules` +4. `blobs` are handled separately + +The `modules` cache is the broadest layer. It includes: + +- `build/x86` +- `install/x86` +- `crossgcc/x86` +- `packages/x86` + +Because this is large, the pipeline does not try to rebuild it inside a +downstream board build just to publish the cache. + +--- + +## Why `x86_save_modules_cache` is separate + +`x86_save_modules_cache` exists so the 25.09 seed job does not spend extra time +saving the full modules cache before releasing its dependents. + +Its intended behavior is: + +1. Wait for `EOL_t480-hotp-maximized` +2. Attach that seed workspace +3. Save the broad x86 modules cache +4. Exit without building another board + +This means: + +- Other 25.09 boards are delayed by `EOL_t480-hotp-maximized` +- They are not delayed by `x86_save_modules_cache` +- The saved cache benefits future pipelines, not the current sibling jobs + +If `x86_save_modules_cache` builds another board, the job is doing the wrong +thing. That makes it a cache-warming build job instead of a cache publication +job, and it can save the wrong state. + +--- + +## What went wrong before + +The problematic behavior was that `x86_save_modules_cache` ran a full board +build for `EOL_x230-hotp-maximized` before saving the modules cache. + +That had two bad effects: + +- It saved cache state derived from an x230 build rather than directly from the + 25.09 seed workspace. +- It made the job look like a generic save step while actually doing more build + work. + +The fix is to keep it as a pure save job that publishes the state already +produced by `EOL_t480-hotp-maximized`. + +--- + +## Cold-cache behavior + +Even with the corrected job shape, cold runs can still be expensive. + +Why: + +- Downstream jobs still download the upstream workspace chain. +- A fork starts with cold CircleCI caches because caches are repository-scoped. +- Saving a large cache still requires uploading the selected directories. + +So a separate save job avoids extending the seed job's critical path, but it +does not eliminate workspace download cost. + +--- + +## When to change this design + +Adjust the model only if one of these is true: + +- The seed board is no longer representative of the fork workspace. +- The persisted workspace is too large and should be split further. +- The modules cache key is too broad and causes low reuse. +- CircleCI changes workspace or cache semantics. + +If you only want faster future runs without delaying current siblings, keep the +separate pure save job model. diff --git a/doc/development.md b/doc/development.md index b07ec8c13..419c90ed7 100644 --- a/doc/development.md +++ b/doc/development.md @@ -13,7 +13,7 @@ git commit -S -s -m "component: short description" ### Message Format -``` +```text component: short imperative description (72 chars max) Optional body explaining the why, not the what. Wrap at 72 chars. @@ -32,14 +32,14 @@ Add a `Co-Authored-By:` trailer only on commits whose **primary content is collaborative documentation** (`doc/*.md` writing). Never add it to code fixes, features, or refactors. -``` +```text Co-Authored-By: Name ``` ## Documentation: `doc/*.md` vs `heads-wiki` | Location | Purpose | Signing required | -|----------|---------|-----------------| +| -------- | ------- | ---------------- | | `doc/*.md` in this repo | Developer-facing: architecture, patterns, internals, build conventions | Yes (same as all commits) | | `linuxboot/heads-wiki` | User-facing: installation, configuration, how-to guides published at osresearch.net | No (lower bar for contribution) | @@ -50,6 +50,9 @@ user installs, configures, or operates a Heads-equipped device. Over time, `doc/*.md` and the wiki may overlap; the canonical user-facing source is the wiki. +For CI internals, cache layering, and workspace-vs-cache behavior, see +[circleci.md](circleci.md). + ## Build Artifacts See [build-artifacts.md](build-artifacts.md) for the full ROM filename @@ -86,6 +89,8 @@ When touching the Makefile or build system: - [ ] Verify dev build filename includes timestamp + branch - [ ] Verify a locally-tagged clean commit produces the short filename - [ ] Verify `.zip` package extracts and `sha256sum -c` passes +- [ ] If changing `.circleci/config.yml`, verify the documented cache/workspace + behavior in [circleci.md](circleci.md) still matches the pipeline ## Coding Conventions diff --git a/doc/docker.md b/doc/docker.md index b34bccbb1..64b01b0fb 100644 --- a/doc/docker.md +++ b/doc/docker.md @@ -5,7 +5,7 @@ environment. Docker images are built with Nix since [PR #1661](https://github.com/linuxboot/heads/pull/1661). See also: [General reproducible-build notes](../README.md#general-notes-on-reproducible-builds), -[QEMU testing](qemu.md). +[QEMU testing](qemu.md), [CircleCI pipeline notes](circleci.md). ---