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update config and describe current build
We locally add Intel's new microcode package, currently under review upstream here: https://review.coreboot.org/#/c/blobs/+/23315/
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README.md

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@@ -18,7 +18,7 @@ See our [releases](https://github.com/merge/coreboot-x230/releases)
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That's the preferred way to use coreboot. The git revision we use is always included in the release.
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### Intel microcode
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* revision `1c` from 2015-02-26 (Intel package [20171117](https://downloadcenter.intel.com/download/27337) added by us; not yet in coreboot upstream)
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* revision `1f` from 2018-03-12 (Intel package [20180312](https://downloadcenter.intel.com/download/27591) added by us; not yet in coreboot upstream)
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### SeaBIOS
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* version [1.11.0](https://seabios.org/Releases#SeaBIOS_1.11.0) from 2017-11-10 (part of coreboot upstream)
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@@ -20,6 +20,7 @@ CONFIG_USE_OPTION_TABLE=y
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CONFIG_COMPRESS_RAMSTAGE=y
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CONFIG_INCLUDE_CONFIG_FILE=y
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CONFIG_COLLECT_TIMESTAMPS=y
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# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
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CONFIG_USE_BLOBS=y
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# CONFIG_COVERAGE is not set
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# CONFIG_UBSAN is not set
@@ -153,6 +154,7 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
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CONFIG_DRIVERS_PS2_KEYBOARD=y
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# CONFIG_PCIEXP_L1_SUB_STATE is not set
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# CONFIG_NO_POST is not set
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CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
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CONFIG_BOARD_ROMSIZE_KB_12288=y
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# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
@@ -386,6 +388,7 @@ CONFIG_ARCH_ARMV8_EXTENSION=0
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# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
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# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
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# CONFIG_ARCH_RISCV is not set
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# CONFIG_ARCH_RISCV_COMPRESSED is not set
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# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
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# CONFIG_ARCH_VERSTAGE_RISCV is not set
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# CONFIG_ARCH_ROMSTAGE_RISCV is not set
@@ -525,6 +528,7 @@ CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
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CONFIG_INTEL_INT15=y
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CONFIG_INTEL_GMA_ACPI=y
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# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
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# CONFIG_INTEL_GMA_SWSMISCI is not set
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CONFIG_GFX_GMA=y
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CONFIG_GFX_GMA_CPU="Ivybridge"
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CONFIG_GFX_GMA_CPU_VARIANT="Normal"

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