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chore: precomputed circuits#22344

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ledwards2225 wants to merge 5 commits intomerge-train/barretenbergfrom
lde/precomputed-circuits
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chore: precomputed circuits#22344
ledwards2225 wants to merge 5 commits intomerge-train/barretenbergfrom
lde/precomputed-circuits

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@ledwards2225 ledwards2225 added the ci-full Run all master checks. label Apr 6, 2026
@ledwards2225 ledwards2225 marked this pull request as ready for review April 6, 2026 22:10
@ledwards2225 ledwards2225 added ci-full-no-test-cache and removed ci-full Run all master checks. labels Apr 9, 2026
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ledwards2225 commented Apr 9, 2026

All flows are ecdsar1+<flow>+sponsored_fpc. Dedicated bench machine, 4 runs each with the first discarded as warmup, median of the remaining 3 reported.
Baseline = NO_PIPELINE=1 NO_TRIM=1; pipelined = NO_TRIM=1. Peak memory is /usr/bin/time -f '%M' (getrusage().ru_maxrss, same metric the CI
dashboard publishes via memusage).

Flow Wall baseline Wall pipelined Wall delta Peak baseline Peak pipelined Peak delta
transfer_0_recursions 5.69 s 5.62 s -1.2% 354 MB 417 MB +17.8%
amm_add_liquidity_1_recursions 11.97 s 11.41 s -4.7% 734 MB 838 MB +14.2%
storage_proof_7_layers 16.06 s 15.10 s -6.0% 1112 MB 1467 MB +31.9%

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ledwards2225 commented Apr 9, 2026

Same comparisons for AMM flow with one call to malloc_trim per accumulate call:

Mode Wall med Wall range Peak med Peak range Wall delta Peak delta
baseline 11.95 s 11.93 - 11.98 756 MB 734 - 757 - -
pipelined 11.45 s 11.44 - 11.48 863 MB 822 - 882 -0.50 s (-4.2%) +107 MB (+14.2%)
baseline-trim 12.77 s 12.76 - 12.79 591 MB 575 - 597 +0.82 s (+6.9%) -165 MB (-21.8%)
pipelined-trim 12.27 s 12.24 - 12.28 605 MB 592 - 610 +0.32 s (+2.7%) -151 MB (-20.0%)

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