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Added support for wareshare ESP32-P4-Pico-wifi.#18570

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Added support for wareshare ESP32-P4-Pico-wifi.#18570
Otpvondoiats wants to merge 4 commits intoapache:masterfrom
Otpvondoiats:lk_p4

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Summary

https://docs.waveshare.net/ESP32-P4-WIFI6

image

The ESP32-P4-Pico is a multimedia development board based on the ESP32-P4 microcontroller. It offers a rich set of human-machine interfaces, including MIPI-CSI (integrated image signal processor ISP), MIPI-DSI, SPI, I2S, I2C, LED PWM, MCPWM, RMT, ADC, UART, and TWAI. Furthermore, it supports USB OTG 2.0 HS and features an onboard 40-pin GPIO expansion interface, making it compatible with some Raspberry Pi Pico expansion boards for broader application adaptation. The ESP32-P4 uses a 360MHz dual-core RISC-V processor, supports up to 32MB of PSRAM, and features peripherals such as USB 2.0, MIPI-CSI/MIPI-DSI, and H.264 encoding, meeting the needs of low-cost, high-performance, and low-power multimedia development. In addition, the ESP32-P4 integrates digital signature peripherals and a dedicated key management unit to ensure data and operational security. The ESP32-P4-Pico is designed for high-performance and high-security applications, meeting the needs of embedded systems in areas such as human-machine interaction, edge computing, and I/O expansion.

Product Features:
Processor: Features a RISC-V 32-bit dual-core processor (HP system), equipped with DSP and instruction set extensions, a floating-point unit (FPU), and a clock speed up to 360MHz.

  • Features a RISC-V 32-bit single-core processor (LP system), with a clock speed up to 40MHz.
    Memory:
    128 KB of high-performance (HP) system read-only memory (ROM).
  • 16 KB of low-power (LP) system read-only memory (ROM).
  • 768 KB of high-performance (HP) L2 memory (L2MEM).
  • 32 KB of low-power (LP) SRAM.
  • 8 KB of tightly coupled system memory (TCM).

The package includes 32 MB of internal PSRAM and 32 MB of onboard Nor Flash. Peripheral Interfaces: The board has 2 × 20 header pins and 27 remaining programmable GPIOs. Onboard speaker and microphone interfaces allow for ideal audio functionality using codec and amplifier chips. An onboard MIPI-CSI high-definition camera interface supports full HD 1080P video capture and encoding, integrating an image signal processor (ISP) and H.264 video encoder, supporting H.264 & JPEG video encoding (1080P @30fps), facilitating applications in computer vision, machine vision, and other fields. An onboard MIPI-DSI high-definition display interface integrates a pixel processing accelerator (PPA) and a 2D graphics acceleration controller (2D DMA), supporting JPEG image decoding (1080P @30fps), providing strong support for high-definition display and a smooth HMI experience, facilitating applications in smart home control screens, industrial control screens, vending machines, and other scenarios.

image

Impact

Hardware: Adds board support for the Waveshare ESP32-P4-PICO-WIFI development board (ESP32-P4 rev v1.0, 768KB HP L2MEM,). On rev < v3.0, the non-contiguous sram_high (384KB) is now added as a second heap region, increasing available heap from ~500KB to ~620KB.
Build: New Kconfig option ESPRESSIF_FLASH_32M for 32MB flash support. New board target esp32p4-pico-wifi-wareshare with nsh, spiflash, and nsh2 configurations. Requires CONFIG_MM_REGIONS=2 for dual heap and CONFIG_ESP32P4_SELECTS_REV_LESS_V3 to bypass chip revision PANIC on rev < v3.0.
Compatibility: No impact on existing boards or configurations. PSRAM driver is not yet available upstream. Boards targeting rev < v3.0 must explicitly opt-in via Kconfig to boot.

Testing

  1. ./tools/configure.sh esp32p4-pico-wifi-wareshare:nsh
  2. make CROSSDEV=riscv32-esp-elf- -j$(nproc)
  3. esptool.py -c esp32p4 -p /dev/ttyACM3 -b 460800 --before default_reset --after hard_reset --no-stub write_flash 0x2000 nuttx.bin
lk@03-20 18:42:18: ~$sudo minicom -b 115200 -D /dev/ttyACM3
[sudo] lk 的密码:


欢迎使用 minicom 2.8

选项: I18n
通信端口 /dev/ttyACM3, 13:29:01

按 CTRL-A Z 说明特殊键


nsh>
nsh>
nsh>
nsh> free
      total       used       free    maxused    maxfree  nused  nfree name
     606636      11188     595448      11568     393200     41      2 Umem
nsh> uname
NuttX
nsh> ps
  TID   PID  PPID PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK            STACK COMMAND
    0     0     0   0 FIFO     Kthread   - Ready              0000000000000000 0002016 Idle_Task
    1     1     0 100 RR       Task      - Running            0000000000000000 0001976 nsh_main
nsh> ls
/:
 data/
 dev/
 proc/
nsh> cd data
nsh> ls
/data:
 test.txt
nsh> touch 111.log
nsh: touch: command not found
nsh>
nsh>
nsh> df
  Block    Number
  Size     Blocks       Used   Available Mounted on
  1024        960         11         949 /data
     0          0          0           0 /proc
nsh> ls
/data:
 test.txt
nsh> cat test.txt
hello-flash
nsh>

Add ESPRESSIF_FLASH_32M Kconfig option and the corresponding
esptool flash size mapping in Config.mk to support boards with
32MB NOR flash.

Signed-off-by: lk <lk@xiaomi.com>
Signed-off-by: likun17 <likun17@xiaomi.com>
The chip revision check was disabled with #if 0 for v1.0 bringup.
Restore the original #ifndef ESP32P4_IGNORE_CHIP_REVISION_CHECK
guard so boards can selectively bypass the PANIC by defining
this macro, while keeping the warning message in the #else branch.

Signed-off-by: lk <lk@xiaomi.com>
Signed-off-by: likun17 <likun17@xiaomi.com>
On ESP32-P4 rev < v3, the 768KB HP L2MEM is split into two
non-contiguous regions: sram_low and sram_high. Previously only
sram_low was used for the heap, wasting 384KB of sram_high.

Export _sram_high_heap_start and _sram_high_heap_end symbols from
the linker script and add sram_high to the heap via kumm_addregion()
in riscv_addregion() when MM_REGIONS > 1.

Signed-off-by: lk <lk@xiaomi.com>
Signed-off-by: likun17 <likun17@xiaomi.com>
Add board support for the Waveshare ESP32-P4-PICO-WIFI development
board. This board features:
- ESP32-P4 dual-core RISC-V MCU (rev v1.0)
- 768KB HP L2MEM (MM_REGIONS=2 for sram_low + sram_high)
- 32MB external NOR Flash (GD25Q256EYIGR, Quad SPI)
- 32MB SiP PSRAM (driver not yet available upstream)

Configurations:
- nsh: basic NuttX shell
- spiflash: NSH with SPI Flash (SmartFS) support

Signed-off-by: lk <lk@xiaomi.com>
Signed-off-by: likun17 <likun17@xiaomi.com>
@github-actions github-actions bot added Area: Build system Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces. Board: risc-v labels Mar 21, 2026
@Otpvondoiats Otpvondoiats reopened this Mar 21, 2026
@Otpvondoiats Otpvondoiats marked this pull request as draft March 21, 2026 05:44
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Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Area: Build system Board: risc-v Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces.

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