Back annotate git information into a ROM #460
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Also remove an un-used I2CCore.rdl which was not used and had typos etc
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The goal here is to improve cache hits in CI, and it's also nice not to rebuild the world just because the git sha changed.
FPGA toolchains typically provide the ability to alter the rom contents during bit stream generation, so we leverage that here as a final step to hopefully preserve cache hits in CI and reduce the amount of build-time required.
We're attempting to use a similar method for both the VHDL and BSV flows across the toolchains which uses a constant hex file to build and then back-annotating the gitsha into the memory at bitstream generation.
Also remove an un-used I2CCore.rdl which was not used and had typos etc.